394f30919a
This patch adds support for constraints `f`, `l`, `I`, `K` according to [1]. The remain constraints (`k`, `m`, `ZB`, `ZC`) will be added later as they are a little more complex than the others. f: A floating-point register (if available). l: A signed 16-bit constant. I: A signed 12-bit constant (for arithmetic instructions). K: An unsigned 12-bit constant (for logic instructions). For now, no need to support register alias (e.g. `$a0`) in llvm as clang will correctly decode the usage of register name aliases into their official names. And AFAIK, the not yet upstreamed `rustc` for LoongArch will always use official register names (e.g. `$r4`). [1] https://gcc.gnu.org/onlinedocs/gccint/Machine-Constraints.html Differential Revision: https://reviews.llvm.org/D134157
90 lines
3.1 KiB
LLVM
90 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 --mattr=+f,+d --target-abi=ilp32d --verify-machineinstrs < %s \
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; RUN: | FileCheck --check-prefix=LA32 %s
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; RUN: llc --mtriple=loongarch64 --mattr=+f,+d --target-abi=lp64d --verify-machineinstrs < %s \
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; RUN: | FileCheck --check-prefix=LA64 %s
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;; These test that we can use architectural names ($f[0-9]*) refer to registers in
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;; inline asm constraint lists. In each case, the named register should be used
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;; for the source register of the `fabs.d`. It is very likely that `$fa0` will
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;; be chosen as the designation register, but this is left to the compiler to
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;; choose.
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;;
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;; Parenthesised registers in comments are the other aliases for this register.
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define double @register_f0(double %a) nounwind {
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; LA32-LABEL: register_f0:
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; LA32: # %bb.0:
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; LA32-NEXT: #APP
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; LA32-NEXT: fabs.d $fa0, $fa0
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; LA32-NEXT: #NO_APP
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; LA32-NEXT: ret
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;
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; LA64-LABEL: register_f0:
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; LA64: # %bb.0:
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; LA64-NEXT: #APP
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; LA64-NEXT: fabs.d $fa0, $fa0
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; LA64-NEXT: #NO_APP
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; LA64-NEXT: ret
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%1 = tail call double asm "fabs.d $0, $1", "=f,{$f0}"(double %a)
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ret double %1
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}
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;; NOTE: This test uses `$f24` (`$fs0`) as an input, so it should be saved.
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define double @register_f24(double %a) nounwind {
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; LA32-LABEL: register_f24:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $sp, $sp, -16
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; LA32-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
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; LA32-NEXT: fmov.d $fs0, $fa0
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; LA32-NEXT: #APP
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; LA32-NEXT: fabs.d $fa0, $fs0
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; LA32-NEXT: #NO_APP
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; LA32-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload
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; LA32-NEXT: addi.w $sp, $sp, 16
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; LA32-NEXT: ret
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;
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; LA64-LABEL: register_f24:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $sp, $sp, -16
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; LA64-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
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; LA64-NEXT: fmov.d $fs0, $fa0
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; LA64-NEXT: #APP
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; LA64-NEXT: fabs.d $fa0, $fs0
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; LA64-NEXT: #NO_APP
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; LA64-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload
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; LA64-NEXT: addi.d $sp, $sp, 16
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; LA64-NEXT: ret
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%1 = tail call double asm "fabs.d $0, $1", "=f,{$f24}"(double %a)
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ret double %1
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}
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;; NOTE: This test uses `$f31` (`$fs7`) as an input, so it should be saved.
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define double @register_f31(double %a) nounwind {
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; LA32-LABEL: register_f31:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $sp, $sp, -16
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; LA32-NEXT: fst.d $fs7, $sp, 8 # 8-byte Folded Spill
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; LA32-NEXT: fmov.d $fs7, $fa0
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; LA32-NEXT: #APP
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; LA32-NEXT: fabs.d $fa0, $fs7
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; LA32-NEXT: #NO_APP
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; LA32-NEXT: fld.d $fs7, $sp, 8 # 8-byte Folded Reload
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; LA32-NEXT: addi.w $sp, $sp, 16
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; LA32-NEXT: ret
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;
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; LA64-LABEL: register_f31:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $sp, $sp, -16
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; LA64-NEXT: fst.d $fs7, $sp, 8 # 8-byte Folded Spill
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; LA64-NEXT: fmov.d $fs7, $fa0
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; LA64-NEXT: #APP
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; LA64-NEXT: fabs.d $fa0, $fs7
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; LA64-NEXT: #NO_APP
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; LA64-NEXT: fld.d $fs7, $sp, 8 # 8-byte Folded Reload
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; LA64-NEXT: addi.d $sp, $sp, 16
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; LA64-NEXT: ret
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%1 = tail call double asm "fabs.d $0, $1", "=f,{$f31}"(double %a)
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ret double %1
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}
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