f3aa441631
Depends on D155829 Reviewed By: SixWeining Differential Revision: https://reviews.llvm.org/D155834
27 lines
834 B
LLVM
27 lines
834 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
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declare <2 x i64> @llvm.loongarch.lsx.vextl.q.d(<2 x i64>)
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define <2 x i64> @lsx_vextl_q_d(<2 x i64> %va) nounwind {
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; CHECK-LABEL: lsx_vextl_q_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vextl.q.d $vr0, $vr0
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; CHECK-NEXT: ret
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entry:
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%res = call <2 x i64> @llvm.loongarch.lsx.vextl.q.d(<2 x i64> %va)
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ret <2 x i64> %res
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}
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declare <2 x i64> @llvm.loongarch.lsx.vextl.qu.du(<2 x i64>)
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define <2 x i64> @lsx_vextl_qu_du(<2 x i64> %va) nounwind {
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; CHECK-LABEL: lsx_vextl_qu_du:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vextl.qu.du $vr0, $vr0
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; CHECK-NEXT: ret
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entry:
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%res = call <2 x i64> @llvm.loongarch.lsx.vextl.qu.du(<2 x i64> %va)
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ret <2 x i64> %res
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}
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