bc3754de0a
Does what it says on the tin: anyext loads with the PCD addressing mode were failing addr mode selection, adding the patterns resolved it.
86 lines
2.7 KiB
LLVM
86 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc < %s -mtriple=m68k-linux -verify-machineinstrs | FileCheck %s
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@0 = external constant <{ [32 x i8] }>
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define i32 @"test_zext_pcd_i8_to_i32"() {
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; CHECK-LABEL: test_zext_pcd_i8_to_i32:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0:
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; CHECK-NEXT: move.b (__unnamed_1+16,%pc), %d0
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; CHECK-NEXT: and.l #255, %d0
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; CHECK-NEXT: rts
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%p = getelementptr inbounds i8, ptr @0, i32 16
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%val = load i8, ptr %p
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%val2 = zext i8 %val to i32
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ret i32 %val2
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}
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define i16 @"test_zext_pcd_i8_to_i16"() {
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; CHECK-LABEL: test_zext_pcd_i8_to_i16:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0:
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; CHECK-NEXT: move.b (__unnamed_1+16,%pc), %d0
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; CHECK-NEXT: and.w #255, %d0
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; CHECK-NEXT: rts
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%p = getelementptr inbounds i8, ptr @0, i32 16
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%val = load i8, ptr %p
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%val2 = zext i8 %val to i16
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ret i16 %val2
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}
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define i32 @"test_zext_pcd_i16_to_i32"() {
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; CHECK-LABEL: test_zext_pcd_i16_to_i32:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0:
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; CHECK-NEXT: move.w (__unnamed_1+16,%pc), %d0
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; CHECK-NEXT: and.l #65535, %d0
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; CHECK-NEXT: rts
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%p = getelementptr inbounds i16, ptr @0, i32 8
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%val = load i16, ptr %p
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%val2 = zext i16 %val to i32
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ret i32 %val2
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}
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define i16 @test_anyext_pcd_i8_to_i16() nounwind {
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; CHECK-LABEL: test_anyext_pcd_i8_to_i16:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: move.b (__unnamed_1+4,%pc), %d0
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; CHECK-NEXT: and.l #255, %d0
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; CHECK-NEXT: lsl.w #8, %d0
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; CHECK-NEXT: ; kill: def $wd0 killed $wd0 killed $d0
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; CHECK-NEXT: rts
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%copyload = load i8, ptr getelementptr inbounds nuw (i8, ptr @0, i32 4)
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%insert_ext = zext i8 %copyload to i16
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%insert_shift = shl i16 %insert_ext, 8
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ret i16 %insert_shift
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}
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define i32 @test_anyext_pcd_i8_to_i32() nounwind {
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; CHECK-LABEL: test_anyext_pcd_i8_to_i32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: moveq #24, %d1
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; CHECK-NEXT: move.b (__unnamed_1+4,%pc), %d0
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; CHECK-NEXT: and.l #255, %d0
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; CHECK-NEXT: lsl.l %d1, %d0
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; CHECK-NEXT: rts
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%copyload = load i8, ptr getelementptr inbounds nuw (i8, ptr @0, i32 4)
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%insert_ext = zext i8 %copyload to i32
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%insert_shift = shl i32 %insert_ext, 24
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ret i32 %insert_shift
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}
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define i32 @test_anyext_pcd_i16_to_i32() nounwind {
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; CHECK-LABEL: test_anyext_pcd_i16_to_i32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: moveq #16, %d1
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; CHECK-NEXT: move.w (__unnamed_1+4,%pc), %d0
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; CHECK-NEXT: and.l #65535, %d0
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; CHECK-NEXT: lsl.l %d1, %d0
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; CHECK-NEXT: rts
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%copyload = load i16, ptr getelementptr inbounds nuw (i8, ptr @0, i32 4)
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%insert_ext = zext i16 %copyload to i32
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%insert_shift = shl i32 %insert_ext, 16
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ret i32 %insert_shift
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}
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