1e153461c6
MIPSr6 has max.s/max.d/min.s/min.d instructions, which can be used as fcanonicalize. For pre-R6, we have no instructions that can fcanonicalize an float, so let's use `fadd Y,X,X` to quiet it if it is NaN. IEEE754-2008 requires that the result of general-computational and quiet-computational operation shouldn't be signal NaN.
98 lines
2.9 KiB
LLVM
98 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=mipsisa32r6 < %s | FileCheck %s --check-prefix=MIPS32R6
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; RUN: llc --mtriple=mips < %s | FileCheck %s --check-prefix=MIPS32R2
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; RUN: llc --mtriple=mips64 < %s | FileCheck %s --check-prefix=MIPS64R2
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declare float @llvm.fcanonicalize.f32(float)
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declare double @llvm.fcanonicalize.f64(double)
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define float @fcanonicalize_float(float %x) {
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; MIPS32R6-LABEL: fcanonicalize_float:
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; MIPS32R6: # %bb.0:
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; MIPS32R6-NEXT: jr $ra
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; MIPS32R6-NEXT: min.s $f0, $f12, $f12
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;
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; MIPS32R2-LABEL: fcanonicalize_float:
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; MIPS32R2: # %bb.0:
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; MIPS32R2-NEXT: mov.s $f0, $f12
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; MIPS32R2-NEXT: add.s $f1, $f12, $f12
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; MIPS32R2-NEXT: c.un.s $f12, $f12
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: movt.s $f0, $f1, $fcc0
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;
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; MIPS64R2-LABEL: fcanonicalize_float:
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; MIPS64R2: # %bb.0:
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; MIPS64R2-NEXT: mov.s $f0, $f12
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; MIPS64R2-NEXT: add.s $f1, $f12, $f12
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; MIPS64R2-NEXT: c.un.s $f12, $f12
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: movt.s $f0, $f1, $fcc0
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%z = call float @llvm.canonicalize.f32(float %x)
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ret float %z
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}
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define float @fcanonicalize_float_nnan(float %x) {
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; MIPS32R6-LABEL: fcanonicalize_float_nnan:
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; MIPS32R6: # %bb.0:
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; MIPS32R6-NEXT: jr $ra
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; MIPS32R6-NEXT: min.s $f0, $f12, $f12
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;
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; MIPS32R2-LABEL: fcanonicalize_float_nnan:
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; MIPS32R2: # %bb.0:
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: mov.s $f0, $f12
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;
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; MIPS64R2-LABEL: fcanonicalize_float_nnan:
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; MIPS64R2: # %bb.0:
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: mov.s $f0, $f12
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%z = call nnan float @llvm.canonicalize.f32(float %x)
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ret float %z
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}
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define double @fcanonicalize_double(double %x) {
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; MIPS32R6-LABEL: fcanonicalize_double:
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; MIPS32R6: # %bb.0:
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; MIPS32R6-NEXT: jr $ra
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; MIPS32R6-NEXT: min.d $f0, $f12, $f12
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;
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; MIPS32R2-LABEL: fcanonicalize_double:
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; MIPS32R2: # %bb.0:
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; MIPS32R2-NEXT: mov.d $f0, $f12
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; MIPS32R2-NEXT: add.d $f2, $f12, $f12
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; MIPS32R2-NEXT: c.un.d $f12, $f12
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: movt.d $f0, $f2, $fcc0
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;
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; MIPS64R2-LABEL: fcanonicalize_double:
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; MIPS64R2: # %bb.0:
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; MIPS64R2-NEXT: mov.d $f0, $f12
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; MIPS64R2-NEXT: add.d $f1, $f12, $f12
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; MIPS64R2-NEXT: c.un.d $f12, $f12
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: movt.d $f0, $f1, $fcc0
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%z = call double @llvm.canonicalize.f64(double %x)
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ret double %z
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}
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define double @fcanonicalize_double_nnan(double %x) {
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; MIPS32R6-LABEL: fcanonicalize_double_nnan:
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; MIPS32R6: # %bb.0:
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; MIPS32R6-NEXT: jr $ra
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; MIPS32R6-NEXT: min.d $f0, $f12, $f12
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;
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; MIPS32R2-LABEL: fcanonicalize_double_nnan:
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; MIPS32R2: # %bb.0:
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; MIPS32R2-NEXT: jr $ra
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; MIPS32R2-NEXT: mov.d $f0, $f12
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;
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; MIPS64R2-LABEL: fcanonicalize_double_nnan:
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; MIPS64R2: # %bb.0:
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; MIPS64R2-NEXT: jr $ra
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; MIPS64R2-NEXT: mov.d $f0, $f12
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%z = call nnan double @llvm.canonicalize.f64(double %x)
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ret double %z
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}
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