369891b674
In most cases, the type information attached to load and store instructions is meaningless and inconsistently applied. We can usually use ".b" loads and avoid the complexity of trying to assign the correct type. The one expectation is sign-extending load, which will continue to use ".s" to ensure the sign extension into a larger register is done correctly.
26 lines
1.3 KiB
LLVM
26 lines
1.3 KiB
LLVM
; RUN: opt < %s -nvptx-lower-args -S | FileCheck %s
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_35 | %ptxas-verify %}
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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target triple = "nvptx64-unknown-unknown"
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%struct.S = type { i32, i32 }
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; Function Attrs: nounwind
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define ptx_kernel void @_Z11TakesStruct1SPi(ptr byval(%struct.S) nocapture readonly %input, ptr nocapture %output) #0 {
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entry:
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; CHECK-LABEL: @_Z11TakesStruct1SPi
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; PTX-LABEL: .visible .entry _Z11TakesStruct1SPi(
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; CHECK: call ptr addrspace(101) @llvm.nvvm.internal.addrspace.wrap.p101.p0(ptr %input)
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%b = getelementptr inbounds %struct.S, ptr %input, i64 0, i32 1
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%0 = load i32, ptr %b, align 4
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; PTX-NOT: ld.param.b32 {{%r[0-9]+}}, [{{%rd[0-9]+}}]
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; PTX: ld.param.b32 [[value:%r[0-9]+]], [_Z11TakesStruct1SPi_param_0+4]
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store i32 %0, ptr %output, align 4
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; PTX-NEXT: st.global.b32 [{{%rd[0-9]+}}], [[value]]
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ret void
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}
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attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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