b279f6b098
Similar to 806761a7629df268c8aed49657aeccffa6bca449
-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple (e.g. Windows, macOS),
leaving a target triple which may not make sense.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
nvptx{,64}-apple-darwin as ELF instead of rejecting it outrightly.
67 lines
2.2 KiB
LLVM
67 lines
2.2 KiB
LLVM
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_80 -mattr=+ptx70 | FileCheck %s
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; RUN: %if ptxas-11.0 %{ llc < %s -mtriple=nvptx64 -mcpu=sm_80 -mattr=+ptx70 | %ptxas-verify -arch=sm_80 %}
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declare i32 @llvm.nvvm.redux.sync.umin(i32, i32)
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; CHECK-LABEL: .func{{.*}}redux_sync_min_u32
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define i32 @redux_sync_min_u32(i32 %src, i32 %mask) {
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; CHECK: redux.sync.min.u32
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%val = call i32 @llvm.nvvm.redux.sync.umin(i32 %src, i32 %mask)
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ret i32 %val
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}
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declare i32 @llvm.nvvm.redux.sync.umax(i32, i32)
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; CHECK-LABEL: .func{{.*}}redux_sync_max_u32
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define i32 @redux_sync_max_u32(i32 %src, i32 %mask) {
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; CHECK: redux.sync.max.u32
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%val = call i32 @llvm.nvvm.redux.sync.umax(i32 %src, i32 %mask)
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ret i32 %val
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}
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declare i32 @llvm.nvvm.redux.sync.add(i32, i32)
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; CHECK-LABEL: .func{{.*}}redux_sync_add_s32
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define i32 @redux_sync_add_s32(i32 %src, i32 %mask) {
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; CHECK: redux.sync.add.s32
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%val = call i32 @llvm.nvvm.redux.sync.add(i32 %src, i32 %mask)
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ret i32 %val
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}
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declare i32 @llvm.nvvm.redux.sync.min(i32, i32)
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; CHECK-LABEL: .func{{.*}}redux_sync_min_s32
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define i32 @redux_sync_min_s32(i32 %src, i32 %mask) {
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; CHECK: redux.sync.min.s32
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%val = call i32 @llvm.nvvm.redux.sync.min(i32 %src, i32 %mask)
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ret i32 %val
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}
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declare i32 @llvm.nvvm.redux.sync.max(i32, i32)
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; CHECK-LABEL: .func{{.*}}redux_sync_max_s32
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define i32 @redux_sync_max_s32(i32 %src, i32 %mask) {
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; CHECK: redux.sync.max.s32
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%val = call i32 @llvm.nvvm.redux.sync.max(i32 %src, i32 %mask)
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ret i32 %val
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}
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declare i32 @llvm.nvvm.redux.sync.and(i32, i32)
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; CHECK-LABEL: .func{{.*}}redux_sync_and_b32
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define i32 @redux_sync_and_b32(i32 %src, i32 %mask) {
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; CHECK: redux.sync.and.b32
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%val = call i32 @llvm.nvvm.redux.sync.and(i32 %src, i32 %mask)
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ret i32 %val
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}
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declare i32 @llvm.nvvm.redux.sync.xor(i32, i32)
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; CHECK-LABEL: .func{{.*}}redux_sync_xor_b32
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define i32 @redux_sync_xor_b32(i32 %src, i32 %mask) {
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; CHECK: redux.sync.xor.b32
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%val = call i32 @llvm.nvvm.redux.sync.xor(i32 %src, i32 %mask)
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ret i32 %val
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}
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declare i32 @llvm.nvvm.redux.sync.or(i32, i32)
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; CHECK-LABEL: .func{{.*}}redux_sync_or_b32
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define i32 @redux_sync_or_b32(i32 %src, i32 %mask) {
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; CHECK: redux.sync.or.b32
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%val = call i32 @llvm.nvvm.redux.sync.or(i32 %src, i32 %mask)
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ret i32 %val
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}
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