be4a1dfbf9
Adds some more code to GlobalISel to enable instruction selection for and/or/xor. - Makes G_IMPLICIT_DEF, G_CONSTANT, G_AND, G_OR, G_XOR legal for 64bit register size. - Implement lowerReturn in CallLowering - Provides mapping of the operands to register banks. - Adds register info to G_COPY operands. The utility functions are all only implemented so far to support this use case. Especially the functions in PPCGenRegisterBankInfo.def are too simple for general use. Reviewed By: nemanjai, shchenz, amyk Differential Revision: https://reviews.llvm.org/D127530
71 lines
1.6 KiB
LLVM
71 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple ppc64le-linux -ppc-asm-full-reg-names -global-isel -o - < %s \
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; RUN: | FileCheck %s
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define i64 @test_andi64(i64 %a, i64 %b) {
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; CHECK-LABEL: test_andi64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: and r3, r3, r4
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; CHECK-NEXT: blr
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%res = and i64 %a, %b
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ret i64 %res
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}
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define i64 @test_nandi64(i64 %a, i64 %b) {
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; CHECK-LABEL: test_nandi64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nand r3, r3, r4
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; CHECK-NEXT: blr
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%and = and i64 %a, %b
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%neg = xor i64 %and, -1
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ret i64 %neg
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}
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define i64 @test_andci64(i64 %a, i64 %b) {
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; CHECK-LABEL: test_andci64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andc r3, r3, r4
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; CHECK-NEXT: blr
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%neg = xor i64 %b, -1
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%and = and i64 %a, %neg
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ret i64 %and
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}
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define i64 @test_ori64(i64 %a, i64 %b) {
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; CHECK-LABEL: test_ori64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: or r3, r3, r4
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; CHECK-NEXT: blr
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%res = or i64 %a, %b
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ret i64 %res
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}
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define i64 @test_orci64(i64 %a, i64 %b) {
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; CHECK-LABEL: test_orci64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: orc r3, r3, r4
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; CHECK-NEXT: blr
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%neg = xor i64 %b, -1
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%or = or i64 %a, %neg
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ret i64 %or
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}
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define i64 @test_nori64(i64 %a, i64 %b) {
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; CHECK-LABEL: test_nori64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nor r3, r3, r4
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; CHECK-NEXT: blr
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%or = or i64 %a, %b
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%neg = xor i64 %or, -1
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ret i64 %neg
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}
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define i64 @test_xori64(i64 %a, i64 %b) {
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; CHECK-LABEL: test_xori64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: blr
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%res = xor i64 %a, %b
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ret i64 %res
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}
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