eb7d16ea25
mflr is kind of expensive on Power version smaller than 10, so we should schedule the store for the mflr's def away from mflr. In epilogue, the expensive mtlr has no user for its def, so it doesn't matter that the load and the mtlr are back-to-back. Reviewed By: RolandF Differential Revision: https://reviews.llvm.org/D137423
82 lines
2.0 KiB
LLVM
82 lines
2.0 KiB
LLVM
; RUN: llc -mtriple=powerpc64-unknown-aix-xcoff -mcpu=pwr4 --mattr=-altivec \
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; RUN: --verify-machineinstrs < %s | FileCheck --check-prefix=64BIT %s
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; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -mcpu=pwr4 --mattr=-altivec \
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; RUN: --verify-machineinstrs < %s | FileCheck --check-prefix=32BIT %s
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define dso_local signext i32 @killOne(i32 signext %i) {
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entry:
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tail call void asm sideeffect "# Clobber CR", "~{cr4}"()
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%call = call signext i32 @do_something(i32 %i)
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ret i32 %call
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}
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define dso_local signext i32 @killAll(i32 signext %i) {
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entry:
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tail call void asm sideeffect "# Clobber CR", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}" ()
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%call = call signext i32 @do_something(i32 %i)
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ret i32 %call
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}
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declare signext i32 @do_something(i32 signext)
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; 64BIT-LABEL: .killOne:
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; 64BIT: mfcr 12
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; 64BIT-NEXT: stw 12, 8(1)
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; 64BIT-NEXT: mflr 0
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; 64BIT-NEXT: stdu 1, -112(1)
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; 64BIT: std 0, 128(1)
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; 64BIT: # Clobber CR
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; 64BIT: bl .do_something
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; 64BIT: addi 1, 1, 112
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; 64BIT-NEXT: ld 0, 16(1)
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; 64BIT-NEXT: lwz 12, 8(1)
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; 64BIT-NEXT: mtlr 0
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; 64BIT-NEXT: mtocrf 8, 12
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; 64BIT: blr
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; 32BIT-LABEL: .killOne:
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; 32BIT: mfcr 12
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; 32BIT-NEXT: stw 12, 4(1)
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; 32BIT-NEXT: mflr 0
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; 32BIT-NEXT: stwu 1, -64(1)
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; 32BIT: stw 0, 72(1)
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; 32BIT: # Clobber CR
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; 32BIT: bl .do_something
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; 32BIT: addi 1, 1, 64
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; 32BIT-NEXT: lwz 0, 8(1)
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; 32BIT-NEXT: lwz 12, 4(1)
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; 32BIT-NEXT: mtlr 0
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; 32BIT-NEXT: mtocrf 8, 12
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; 32BIT: blr
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; 64BIT-LABEL: .killAll:
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; 64BIT: addi 1, 1, 112
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; 64BIT-NEXT: ld 0, 16(1)
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; 64BIT-NEXT: lwz 12, 8(1)
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; 64BIT-NEXT: mtlr 0
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; 64BIT-NEXT: mtocrf 32, 12
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; 64BIT-NEXT: mtocrf 16, 12
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; 64BIT-NEXT: mtocrf 8, 12
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; 64BIT-NEXT: blr
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; 32BIT-LABEL: .killAll:
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; 32BIT: addi 1, 1, 64
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; 32BIT-NEXT: lwz 0, 8(1)
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; 32BIT-NEXT: lwz 12, 4(1)
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; 32BIT-NEXT: mtlr 0
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; 32BIT-NEXT: mtocrf 32, 12
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; 32BIT-NEXT: mtocrf 16, 12
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; 32BIT-NEXT: mtocrf 8, 12
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; 32BIT-NEXT: blr
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