0295c2ada4
Implementation is NOT compatible with IBM XL C 16.1 and earlier but is compatible with GCC. It handles all ByVals with greater alignment then pointer width the same way IBM XL C handles Byvals that have vector members. For overaligned objects that do not contain vectors IBM XL C does not align them properly if they are passed in the GPR argument registers. This patch was originally written by Sean Fertile @mandlebug. Previously on Phabricator https://reviews.llvm.org/D105659
41 lines
2.1 KiB
LLVM
41 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -mcpu=pwr7 \
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; RUN: -mattr=-altivec -verify-machineinstrs < %s | \
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; RUN: FileCheck --check-prefix=32BIT %s
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; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -mcpu=pwr7 \
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; RUN: -mattr=-altivec -verify-machineinstrs < %s | \
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; RUN: FileCheck --check-prefix=64BIT %s
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%struct.vec_struct = type { <4 x i32> }
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; Function Attrs: norecurse nounwind readonly
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define i32 @vec_struct_test(i32 %i, ptr nocapture readonly byval(%struct.vec_struct) align 16 %vs) {
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; 32BIT-LABEL: name: vec_struct_test
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; 32BIT: bb.0.entry:
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; 32BIT-NEXT: liveins: $r3, $r5, $r6, $r7, $r8
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; 32BIT-NEXT: {{ $}}
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; 32BIT-NEXT: STW killed renamable $r7, 8, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 8, align 8)
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; 32BIT-NEXT: STW killed renamable $r6, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4)
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; 32BIT-NEXT: STW renamable $r5, 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0, align 16)
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; 32BIT-NEXT: STW killed renamable $r8, 12, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 12)
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; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r5, killed renamable $r3
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; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
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;
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; 64BIT-LABEL: name: vec_struct_test
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; 64BIT: bb.0.entry:
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; 64BIT-NEXT: liveins: $x3, $x5, $x6
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; 64BIT-NEXT: {{ $}}
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; 64BIT-NEXT: STD renamable $x5, 0, %fixed-stack.0 :: (store (s64) into %fixed-stack.0, align 16)
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; 64BIT-NEXT: STD killed renamable $x6, 8, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 8)
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; 64BIT-NEXT: renamable $x4 = RLDICL killed renamable $x5, 32, 32
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; 64BIT-NEXT: renamable $r3 = nsw ADD4 renamable $r4, renamable $r3, implicit killed $x3, implicit killed $x4, implicit-def $x3
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; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
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entry:
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%vsi = getelementptr inbounds i8, ptr %vs, i32 0
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%0 = load <4 x i32>, ptr %vsi, align 16
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%vecext = extractelement <4 x i32> %0, i32 0
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%add = add nsw i32 %vecext, %i
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ret i32 %add
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}
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