29eb3dcfe6
Summary: Some constants can be handled with less instructions than our current results. And it seems our original approach is not very easy to extend. Therefore this patch proposes to materialize all 64-bit constants by enumerated patterns. I traversed almost all constants to verified the functionality of these pattens. A traversed comparison of the number of instructions used by the original method and the new method has also been completed, where no degradation was caused by this patch. This patch also passed Bootstrap test and SPEC test. Improvements of this patch are shown in llvm/test/CodeGen/PowerPC/constants-i64.ll Reviewed By: steven.zhang, stefanp Differential Revision: https://reviews.llvm.org/D92089
24 lines
577 B
LLVM
24 lines
577 B
LLVM
; RUN: llc -verify-machineinstrs -mcpu=ppc64 < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind
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define void @bar() #0 {
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entry:
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tail call void @xxx([2 x i64] [i64 4607182418800017408, i64 4611686018427387904]) #0
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ret void
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; CHECK-LABEL: @bar
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; CHECK-DAG: li [[REG1:[0-9]+]], 1023
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; CHECK-DAG: li [[REG2:[0-9]+]], {{1$}}
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; CHECK-DAG: rldic 3, [[REG1]], 52, 2
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; CHECK-DAG: rldic 4, [[REG2]], 62, 1
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; CHECK: bl xxx
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; CHECK: blr
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}
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declare void @xxx([2 x i64])
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attributes #0 = { nounwind }
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