llvm-project/llvm/test/CodeGen/PowerPC/build-vector-to-ld-chain.ll
Nemanja Ivanovic cb3f415cd2 [PowerPC] Fix up memory ordering after combining BV to a load
The combiner for BUILD_VECTOR that merges consecutive
loads into a wide load had two issues:

- It didn't check that the input loads all have the
  same input chain
- It didn't update nodes that are chained to the original
  loads to be chained to the new load

This caused issues with bootstrap when
3c4d2a03968ccf5889bacffe02d6fa2443b0260f was committed.
This patch fixes the issue so it can unblock this commit.

Differential revision: https://reviews.llvm.org/D140046
2022-12-16 08:57:36 -06:00

60 lines
1.8 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- -mcpu=pwr8 < %s | \
; RUN: FileCheck %s
%0 = type <{ %1, ptr, i32, [4 x i8] }>
%1 = type { %2 }
%2 = type { %3 }
%3 = type { ptr, ptr, ptr }
$testfunc = comdat any
declare void @_ZdlPv() local_unnamed_addr #0
define void @testfunc(i64 %arg) local_unnamed_addr #0 comdat {
; CHECK-LABEL: testfunc:
; CHECK: # %bb.0: # %bb
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stdu 1, -80(1)
; CHECK-NEXT: std 0, 96(1)
; CHECK-NEXT: .cfi_def_cfa_offset 80
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: .cfi_offset v30, -32
; CHECK-NEXT: .cfi_offset v31, -16
; CHECK-NEXT: li 4, 48
; CHECK-NEXT: addi 3, 3, 24
; CHECK-NEXT: stvx 30, 1, 4 # 16-byte Folded Spill
; CHECK-NEXT: li 4, 64
; CHECK-NEXT: stvx 31, 1, 4 # 16-byte Folded Spill
; CHECK-NEXT: lxvd2x 63, 0, 3
; CHECK-NEXT: xxswapd 62, 63
; CHECK-NEXT: bc 12, 20, .LBB0_2
; CHECK-NEXT: # %bb.1: # %bb37
; CHECK-NEXT: bl _ZdlPv
; CHECK-NEXT: nop
; CHECK-NEXT: .LBB0_2: # %bb38
; CHECK-NEXT: stxsiwx 62, 0, 3
; CHECK-NEXT: stxsdx 63, 0, 3
; CHECK-NEXT: li 3, 64
; CHECK-NEXT: lvx 31, 1, 3 # 16-byte Folded Reload
; CHECK-NEXT: li 3, 48
; CHECK-NEXT: lvx 30, 1, 3 # 16-byte Folded Reload
; CHECK-NEXT: addi 1, 1, 80
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: blr
bb:
%i = inttoptr i64 %arg to ptr
%i6 = getelementptr inbounds %0, ptr %i, i64 0, i32 1
%i7 = load <12 x i8>, ptr %i6, align 8
br i1 poison, label %bb38, label %bb37
bb37: ; preds = %bb
tail call void @_ZdlPv() #1
br label %bb38
bb38: ; preds = %bb37, %bb
store <12 x i8> %i7, ptr poison, align 8
ret void
}