2534dc120a
This patch turns on support for CR bit accesses for Power8 and above. The reason why CR bits are turned on as the default for Power8 and above is that because later architectures make use of builtins and instructions that require CR bit accesses (such as the use of setbc in the vector string isolate predicate and bcd builtins on Power10). This patch also adds the clang portion to allow for turning on CR bits in the front end if the user so desires to. Differential Revision: https://reviews.llvm.org/D124060
21 lines
557 B
LLVM
21 lines
557 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -O0 < %s | FileCheck %s
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target triple = "powerpc64le--linux-gnu"
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define i1 @Test(double %a) {
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; CHECK-LABEL: Test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xscvdpsxws 0, 1
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; CHECK-NEXT: mffprwz 3, 0
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; CHECK-NEXT: cmplwi 3, 65534
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; CHECK-NEXT: crmove 20, 2
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; CHECK-NEXT: li 4, 0
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; CHECK-NEXT: li 3, 1
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; CHECK-NEXT: isel 3, 3, 4, 20
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; CHECK-NEXT: blr
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entry:
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%conv = fptoui double %a to i16
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%cmp = icmp eq i16 %conv, -2
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ret i1 %cmp
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}
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