427fb35192
The LIT test cases were migrated with the script provided by Nikita Popov. Due to the size of the change it is split into several parts. Reviewed By: nemanja, amyk, nikic, PowerPC Differential Revision: https://reviews.llvm.org/D135470
84 lines
3.5 KiB
LLVM
84 lines
3.5 KiB
LLVM
; RUN: llc -mcpu=pwr7 -verify-machineinstrs \
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; RUN: -mtriple=powerpc-unknown-aix < %s | FileCheck %s
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; RUN: llc -mcpu=pwr7 -verify-machineinstrs \
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; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s
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; RUN: llc -mcpu=pwr7 -verify-machineinstrs -no-integrated-as \
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; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix=NOIS
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; Function Attrs: noinline nounwind optnone uwtable
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define dso_local signext i32 @NoBarrier_CompareAndSwap(ptr %ptr, i32 signext %old_value, i32 signext %new_value) #0 {
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; CHECK-LABEL: NoBarrier_CompareAndSwap:
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; CHECK: #APP
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; CHECK-NEXT: L..tmp0:
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; CHECK-NEXT: lwarx 6, 0, 3
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; CHECK-NEXT: cmpw 4, 6
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; CHECK-NEXT: bne- 0, L..tmp1
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; CHECK-NEXT: stwcx. 5, 0, 3
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; CHECK-NEXT: bne- 0, L..tmp0
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; CHECK-NEXT: L..tmp1:
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; NOIS-LABEL: NoBarrier_CompareAndSwap:
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; NOIS: #APP
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; NOIS-NEXT: 1: lwarx 6, 0, 3
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; NOIS-NEXT: cmpw 4, 6
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; NOIS-NEXT: bne- 2f
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; NOIS-NEXT: stwcx. 5, 0, 3
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; NOIS-NEXT: bne- 1b
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; NOIS-NEXT: 2:
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entry:
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%ptr.addr = alloca ptr, align 8 %old_value.addr = alloca i32, align 4
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%new_value.addr = alloca i32, align 4
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%result = alloca i32, align 4
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store ptr %ptr, ptr %ptr.addr, align 8
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store i32 %old_value, ptr %old_value.addr, align 4
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store i32 %new_value, ptr %new_value.addr, align 4
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%0 = load ptr, ptr %ptr.addr, align 8
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%1 = load i32, ptr %old_value.addr, align 4
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%2 = load i32, ptr %new_value.addr, align 4
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%3 = call i32 asm sideeffect "1: lwarx $0, $4, $1 \0A\09 cmpw $2, $0 \0A\09 bne- 2f \0A\09 stwcx. $3, $4, $1 \0A\09 bne- 1b \0A\092: \0A\09", "=&b,b,b,b,i,~{cr0},~{ctr}"(ptr %0, i32 %1, i32 %2, i32 0)
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store i32 %3, ptr %result, align 4
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%4 = load i32, ptr %result, align 4
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ret i32 %4
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}
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define dso_local signext i32 @NoBarrier_CompareAndSwapExtMne(ptr %ptr, i32 signext %old_value, i32 signext %new_value) #0 {
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; CHECK-LABEL: NoBarrier_CompareAndSwapExtMne:
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; CHECK: #APP
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; CHECK-NEXT: L..tmp2:
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; CHECK-NEXT: lwarx 6, 0, 3
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; CHECK-NEXT: cmpw 4, 6
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; CHECK-NEXT: bne- 0, L..tmp3
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; CHECK-NEXT: stwcx. 5, 0, 3
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; CHECK-NEXT: bne- 0, L..tmp2
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; CHECK-NEXT: L..tmp3:
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; NOIS-LABEL: NoBarrier_CompareAndSwapExtMne:
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; NOIS: #APP
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; NOIS-NEXT: 1: lwarx 6, 0, 3
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; NOIS-NEXT: cmpw 4, 6
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; NOIS-NEXT: bne- 2f
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; NOIS-NEXT: stwcx. 5, 0, 3
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; NOIS-NEXT: bne- 1b
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; NOIS-NEXT: 2:
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entry:
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%ptr.addr = alloca ptr, align 8 %old_value.addr = alloca i32, align 4
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%new_value.addr = alloca i32, align 4
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%result = alloca i32, align 4
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store ptr %ptr, ptr %ptr.addr, align 8
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store i32 %old_value, ptr %old_value.addr, align 4
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store i32 %new_value, ptr %new_value.addr, align 4
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%0 = load ptr, ptr %ptr.addr, align 8
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%1 = load i32, ptr %old_value.addr, align 4
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%2 = load i32, ptr %new_value.addr, align 4
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%3 = call i32 asm sideeffect "1: lwarx $0, $4, $1, 0 \0A\09 cmpw $2, $0 \0A\09 bne- 2f \0A\09 stwcx. $3, $4, $1 \0A\09 bne- 1b \0A\092: \0A\09", "=&b,b,b,b,i,~{cr0},~{ctr}"(ptr %0, i32 %1, i32 %2, i32 0)
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store i32 %3, ptr %result, align 4
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%4 = load i32, ptr %result, align 4
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ret i32 %4
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}
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