a51712751c
Utilize common API in PPCTargetParser (https://github.com/llvm/llvm-project/pull/97541) to set default CPU with same interfaces for LLC. This will update AIX default CPU to pwr7 and LoP powerppc64 default CPU to ppc64.
42 lines
1.3 KiB
LLVM
42 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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;RUN: llc < %s --mcpu=ppc -mtriple=powerpc64-unknown-linux-gnu -mattr=+altivec | FileCheck %s -check-prefix=BE
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;RUN: llc < %s --mtriple=powerpc64le-unknown-linux-gnu -mattr=+altivec | FileCheck %s -check-prefix=LE
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define <8 x i32> @test_large_vec_vaarg(i32 %n, ...) {
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; BE-LABEL: test_large_vec_vaarg:
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; BE: # %bb.0:
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; BE-NEXT: ld 3, -8(1)
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; BE-NEXT: addi 3, 3, 15
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; BE-NEXT: rldicr 3, 3, 0, 59
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; BE-NEXT: addi 4, 3, 16
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; BE-NEXT: addi 5, 3, 31
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; BE-NEXT: std 4, -8(1)
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; BE-NEXT: rldicr 4, 5, 0, 59
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; BE-NEXT: lvx 2, 0, 3
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; BE-NEXT: addi 3, 4, 16
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; BE-NEXT: std 3, -8(1)
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; BE-NEXT: lvx 3, 0, 4
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; BE-NEXT: blr
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;
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; LE-LABEL: test_large_vec_vaarg:
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; LE: # %bb.0:
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; LE-NEXT: ld 3, -8(1)
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; LE-NEXT: addi 3, 3, 15
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; LE-NEXT: rldicr 3, 3, 0, 59
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; LE-NEXT: addi 4, 3, 16
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; LE-NEXT: std 4, -8(1)
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; LE-NEXT: lxvd2x 0, 0, 3
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; LE-NEXT: ld 3, -8(1)
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; LE-NEXT: addi 3, 3, 15
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; LE-NEXT: rldicr 3, 3, 0, 59
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; LE-NEXT: addi 4, 3, 16
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; LE-NEXT: std 4, -8(1)
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; LE-NEXT: xxswapd 34, 0
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; LE-NEXT: lxvd2x 0, 0, 3
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; LE-NEXT: xxswapd 35, 0
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; LE-NEXT: blr
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%args = alloca ptr, align 4
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%x = va_arg ptr %args, <8 x i32>
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ret <8 x i32> %x
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}
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