53c37f300d
On PowerPC there are 128 bit VSX registers. These registers are half overlapped with 64 bit floating point registers (FPR). The 64 bit half of the VXS register that does not overlap with the FPR does not overlap with any other register class. The FPR are the only subregisters of the VSX registers but they do not fully cover the 128 bit super register. This leads to incorrect lane masks being created. This patch adds phony registers for the other half of the VSX registers in order to fully cover them and to make sure that the lane masks are not the same for the VSX and the floating point register.
184 lines
6.4 KiB
LLVM
184 lines
6.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s \
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; RUN: | FileCheck %s --check-prefixes=CHECK-S,CHECK-ALL
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; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s \
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; RUN: | FileCheck %s --check-prefixes=CHECK-S,CHECK-ALL
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names < %s \
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; RUN: | FileCheck %s --check-prefixes=CHECK-P9,CHECK-ALL
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr9 --code-model=large -ppc-asm-full-reg-names < %s \
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; RUN: | FileCheck %s --check-prefixes=CHECK-LARGE,CHECK-ALL
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@global_int = common dso_local local_unnamed_addr global i32 0, align 4
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define dso_local signext i32 @NoTOC() local_unnamed_addr {
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; CHECK-ALL-LABEL: NoTOC:
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; CHECK-S-NOT: .localentry
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; CHECK-S: li r3, 42
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; CHECK-S-NEXT: blr
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entry:
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ret i32 42
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}
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define dso_local signext i32 @AsmClobberX2(i32 signext %a, i32 signext %b) local_unnamed_addr {
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; CHECK-ALL-LABEL: AsmClobberX2:
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; CHECK-S: .localentry AsmClobberX2, 1
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; CHECK-S: add r3, r4, r3
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; CHECK-S: #APP
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; CHECK-S-NEXT: nop
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; CHECK-S-NEXT: #NO_APP
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; CHECK-S: blr
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entry:
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%add = add nsw i32 %b, %a
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tail call void asm sideeffect "nop", "~{r2}"()
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ret i32 %add
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}
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; FIXME: This is actually a test case that shows a bug. On power9 and earlier
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; this test should not compile. On later CPUs (like this test) the @toc
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; should be replaced with @pcrel and we won't need R2 and so the problem
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; goes away.
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define dso_local signext i32 @AsmClobberX2WithTOC(i32 signext %a, i32 signext %b) local_unnamed_addr {
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; CHECK-ALL-LABEL: AsmClobberX2WithTOC:
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; CHECK-LARGE: ld r2, .Lfunc_toc2-.Lfunc_gep2(r12)
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; CHECK-LARGE: add r2, r2, r12
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; CHECK-S: .localentry AsmClobberX2WithTOC
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; CHECK-S: #APP
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; CHECK-S-NEXT: li r2, 0
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; CHECK-S-NEXT: #NO_APP
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; CHECK-S-NEXT: plwz r5, global_int@PCREL(0), 1
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; CHECK-S-NEXT: add r3, r4, r3
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; CHECK-S-NEXT: add r3, r3, r5
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; CHECK-S-NEXT: extsw r3, r3
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; CHECK-S-NEXT: blr
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entry:
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%add = add nsw i32 %b, %a
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tail call void asm sideeffect "li 2, 0", "~{r2}"()
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%0 = load i32, ptr @global_int, align 4
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%add1 = add nsw i32 %add, %0
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ret i32 %add1
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}
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define dso_local signext i32 @AsmClobberX5(i32 signext %a, i32 signext %b) local_unnamed_addr {
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; CHECK-ALL-LABEL: AsmClobberX5:
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; CHECK-S: .localentry AsmClobberX5, 1
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; CHECK-P9-NOT: .localentry
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; CHECK-ALL: # %bb.0: # %entry
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; CHECK-S-NEXT: add r3, r4, r3
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; CHECK-S-NEXT: #APP
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; CHECK-S-NEXT: nop
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; CHECK-S-NEXT: #NO_APP
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; CHECK-S-NEXT: extsw r3, r3
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; CHECK-S-NEXT: blr
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entry:
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%add = add nsw i32 %b, %a
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tail call void asm sideeffect "nop", "~{r5}"()
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ret i32 %add
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}
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; Clobber all GPRs except R2.
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define dso_local signext i32 @AsmClobberNotR2(i32 signext %a, i32 signext %b) local_unnamed_addr {
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; CHECK-ALL-LABEL: AsmClobberNotR2:
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; CHECK-S: .localentry AsmClobberNotR2, 1
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; CHECK-P9-NOT: .localentry
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; CHECK-S: add r3, r4, r3
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; CHECK-S: stw r3, -148(r1) # 4-byte Folded Spill
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; CHECK-S-NEXT: #APP
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; CHECK-S-NEXT: nop
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; CHECK-S-NEXT: #NO_APP
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; CHECK-S-NEXT: lwz r3, -148(r1) # 4-byte Folded Reload
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; CHECK-S: blr
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entry:
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%add = add nsw i32 %b, %a
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tail call void asm sideeffect "nop", "~{r0},~{r1},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"()
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ret i32 %add
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}
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; Increase register pressure enough to force the register allocator to
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; make use of R2.
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define dso_local signext i32 @X2IsCallerSaved(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h) local_unnamed_addr {
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; CHECK-ALL-LABEL: X2IsCallerSaved:
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; CHECK-S: .localentry X2IsCallerSaved, 1
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; CHECK-P9-NOT: .localentry
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; CHECK-ALL: # %bb.0: # %entry
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; CHECK-S-NEXT: std r29, -24(r1) # 8-byte Folded Spill
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; CHECK-S-NEXT: std r30, -16(r1) # 8-byte Folded Spill
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; CHECK-S-NEXT: add r11, r4, r3
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; CHECK-S-NEXT: sub r29, r8, r9
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; CHECK-S-NEXT: add r9, r10, r9
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; CHECK-S-NEXT: sub r10, r10, r3
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; CHECK-S-NEXT: mullw r3, r4, r3
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; CHECK-S-NEXT: sub r12, r4, r5
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; CHECK-S-NEXT: add r0, r6, r5
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; CHECK-S-NEXT: sub r2, r6, r7
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; CHECK-S-NEXT: add r30, r8, r7
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; CHECK-S-NEXT: mullw r3, r3, r11
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; CHECK-S-NEXT: mullw r3, r3, r5
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; CHECK-S-NEXT: mullw r3, r3, r6
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; CHECK-S-NEXT: mullw r3, r3, r12
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; CHECK-S-NEXT: mullw r3, r3, r0
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; CHECK-S-NEXT: mullw r3, r3, r7
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; CHECK-S-NEXT: mullw r3, r3, r8
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; CHECK-S-NEXT: mullw r3, r3, r2
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; CHECK-S-NEXT: mullw r3, r3, r30
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; CHECK-S-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
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; CHECK-S-NEXT: mullw r3, r3, r29
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; CHECK-S-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
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; CHECK-S-NEXT: mullw r3, r3, r9
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; CHECK-S-NEXT: mullw r3, r3, r10
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; CHECK-S-NEXT: extsw r3, r3
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; CHECK-S-NEXT: blr
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entry:
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%add = add nsw i32 %b, %a
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%sub = sub nsw i32 %b, %c
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%add1 = add nsw i32 %d, %c
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%sub2 = sub nsw i32 %d, %e
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%add3 = add nsw i32 %f, %e
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%sub4 = sub nsw i32 %f, %g
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%add5 = add nsw i32 %h, %g
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%sub6 = sub nsw i32 %h, %a
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%mul = mul i32 %b, %a
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%mul7 = mul i32 %mul, %add
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%mul8 = mul i32 %mul7, %c
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%mul9 = mul i32 %mul8, %d
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%mul10 = mul i32 %mul9, %sub
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%mul11 = mul i32 %mul10, %add1
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%mul12 = mul i32 %mul11, %e
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%mul13 = mul i32 %mul12, %f
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%mul14 = mul i32 %mul13, %sub2
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%mul15 = mul i32 %mul14, %add3
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%mul16 = mul i32 %mul15, %sub4
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%mul17 = mul i32 %mul16, %add5
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%mul18 = mul i32 %mul17, %sub6
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ret i32 %mul18
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}
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define dso_local signext i32 @UsesX2AsTOC() local_unnamed_addr {
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; CHECK-ALL-LABEL: UsesX2AsTOC:
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; CHECK-LARGE: ld r2, .Lfunc_toc6-.Lfunc_gep6(r12)
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; CHECK-LARGE: add r2, r2, r12
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; CHECK-ALL: # %bb.0: # %entry
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entry:
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%0 = load i32, ptr @global_int, align 4
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ret i32 %0
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}
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define dso_local double @UsesX2AsConstPoolTOC() local_unnamed_addr {
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; CHECK-ALL-LABEL: UsesX2AsConstPoolTOC:
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; CHECK-LARGE: ld r2, .Lfunc_toc7-.Lfunc_gep7(r12)
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; CHECK-LARGE: add r2, r2, r12
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; CHECK-S-NOT: .localentry
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; CHECK-ALL: # %bb.0: # %entry
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; CHECK-S-NEXT: xxsplti32dx vs1, 0, 1078011044
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; CHECK-S-NEXT: xxsplti32dx vs1, 1, -337824948
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; CHECK-S-NEXT: blr
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entry:
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ret double 0x404124A4EBDD334C
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}
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