56acb06bc6
In 'asm goto' statements ('callbr' in LLVM IR), you can specify one or
more labels / basic blocks in the containing function which the assembly
code might jump to. If you're also compiling with branch target
enforcement via BTI, then previously listing a basic block as a possible
jump destination of an asm goto would cause a BTI instruction to be
placed at the start of the block, in case the assembly code used an
_indirect_ branch instruction (i.e. to a destination address read from a
register) to jump to that location. Now it doesn't do that any more:
branches to destination labels from the assembly code are assumed to be
direct branches (to a relative offset encoded in the instruction), which
don't require a BTI at their destination.
This change was proposed in https://discourse.llvm.org/t/85845 and there
seemed to be no disagreement. The rationale is:
1. it brings clang's handling of asm goto in Arm and AArch64 in line
with gcc's, which didn't generate BTIs at the target labels in the first
place.
2. it improves performance in the Linux kernel, which uses a lot of 'asm
goto' in which the assembly language just contains a NOP, and the
label's address is saved elsewhere to let the kernel self-modify at run
time to swap between the original NOP and a direct branch to the label.
This allows hot code paths to be instrumented for debugging, at only the
cost of a NOP when the instrumentation is turned off, instead of the
larger cost of an indirect branch. In this situation a BTI is
unnecessary (if the branch happens it's direct), and since the code
paths are hot, also a noticeable performance hit.
Implementation:
`SelectionDAGBuilder::visitCallBr` is the place where 'asm goto' target
labels are handled. It calls `setIsInlineAsmBrIndirectTarget()` on each
target `MachineBasicBlock`. Previously it also called
`setMachineBlockAddressTaken()`, which made `hasAddressTaken()` return
true, which caused a BTI to be added in the Arm backends.
Now `visitCallBr` doesn't call `setMachineBlockAddressTaken()` any more
on asm goto targets, but `hasAddressTaken()` also checks the flag set by
`setIsInlineAsmBrIndirectTarget()`. So call sites that were using
`hasAddressTaken()` don't need to be modified. But the Arm backends
don't call `hasAddressTaken()` any more: instead they test two more
specific query functions that cover all the reasons `hasAddressTaken()`
might have returned true _except_ being an asm goto target.
Testing:
The new test `AArch64/callbr-asm-label-bti.ll` is testing the actual
change, where it expects not to see a `bti` instruction after
`[[LABEL]]`. The rest of the test changes are all churn, due to the
flags on basic blocks changing. Actual output code hasn't changed in any
of the existing tests, only comments and diagnostics.
Further work:
`RISCVIndirectBranchTracking.cpp` and `X86IndirectBranchTracking.cpp`
also call `hasAddressTaken()` in a way that might benefit from using the
same more specific check I've put in `ARMBranchTargets.cpp` and
`AArch64BranchTargets.cpp`. But I'm not sure of that, so in this commit
I've only changed the Arm backends, and left those alone.
261 lines
7.5 KiB
LLVM
261 lines
7.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64le-unknown-linux-unknown -verify-machineinstrs %s \
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; RUN: -ppc-asm-full-reg-names -o - | FileCheck %s --check-prefix=PPC64LE
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; RUN: llc -mtriple=powerpc64-unknown-linux-unknown -verify-machineinstrs %s \
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; RUN: -ppc-asm-full-reg-names -o - | FileCheck %s --check-prefix=PPC64BE
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define dso_local void @ClobberLR() local_unnamed_addr #0 {
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; PPC64LE-LABEL: ClobberLR:
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; PPC64LE: # %bb.0: # %entry
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; PPC64LE-NEXT: mflr r0
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; PPC64LE-NEXT: stdu r1, -32(r1)
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; PPC64LE-NEXT: std r0, 48(r1)
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; PPC64LE-NEXT: #APP
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; PPC64LE-NEXT: #NO_APP
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; PPC64LE-NEXT: addi r1, r1, 32
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; PPC64LE-NEXT: ld r0, 16(r1)
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; PPC64LE-NEXT: mtlr r0
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; PPC64LE-NEXT: blr
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;
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; PPC64BE-LABEL: ClobberLR:
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; PPC64BE: # %bb.0: # %entry
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; PPC64BE-NEXT: mflr r0
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; PPC64BE-NEXT: stdu r1, -48(r1)
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; PPC64BE-NEXT: std r0, 64(r1)
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; PPC64BE-NEXT: #APP
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; PPC64BE-NEXT: #NO_APP
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; PPC64BE-NEXT: addi r1, r1, 48
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; PPC64BE-NEXT: ld r0, 16(r1)
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; PPC64BE-NEXT: mtlr r0
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; PPC64BE-NEXT: blr
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entry:
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tail call void asm sideeffect "", "~{lr}"()
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ret void
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}
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define dso_local void @ClobberR5() local_unnamed_addr #0 {
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; PPC64LE-LABEL: ClobberR5:
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; PPC64LE: # %bb.0: # %entry
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; PPC64LE-NEXT: #APP
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; PPC64LE-NEXT: #NO_APP
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; PPC64LE-NEXT: blr
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;
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; PPC64BE-LABEL: ClobberR5:
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; PPC64BE: # %bb.0: # %entry
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; PPC64BE-NEXT: #APP
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; PPC64BE-NEXT: #NO_APP
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; PPC64BE-NEXT: blr
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entry:
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tail call void asm sideeffect "", "~{r5}"()
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ret void
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}
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define dso_local void @ClobberR15() local_unnamed_addr #0 {
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; PPC64LE-LABEL: ClobberR15:
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; PPC64LE: # %bb.0: # %entry
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; PPC64LE-NEXT: std r15, -136(r1) # 8-byte Folded Spill
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; PPC64LE-NEXT: #APP
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; PPC64LE-NEXT: #NO_APP
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; PPC64LE-NEXT: ld r15, -136(r1) # 8-byte Folded Reload
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; PPC64LE-NEXT: blr
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;
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; PPC64BE-LABEL: ClobberR15:
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; PPC64BE: # %bb.0: # %entry
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; PPC64BE-NEXT: std r15, -136(r1) # 8-byte Folded Spill
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; PPC64BE-NEXT: #APP
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; PPC64BE-NEXT: #NO_APP
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; PPC64BE-NEXT: ld r15, -136(r1) # 8-byte Folded Reload
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; PPC64BE-NEXT: blr
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entry:
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tail call void asm sideeffect "", "~{r15}"()
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ret void
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}
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;; Test for INLINEASM_BR
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define dso_local signext i32 @ClobberLR_BR(i32 signext %in) #0 {
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; PPC64LE-LABEL: ClobberLR_BR:
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; PPC64LE: # %bb.0: # %entry
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; PPC64LE-NEXT: mflr r0
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; PPC64LE-NEXT: stdu r1, -32(r1)
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; PPC64LE-NEXT: std r0, 48(r1)
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; PPC64LE-NEXT: #APP
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; PPC64LE-NEXT: nop
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; PPC64LE-NEXT: #NO_APP
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; PPC64LE-NEXT: .LBB3_1: # %return
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; PPC64LE-NEXT: addi r1, r1, 32
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; PPC64LE-NEXT: ld r0, 16(r1)
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; PPC64LE-NEXT: mtlr r0
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; PPC64LE-NEXT: blr
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; PPC64LE-NEXT: .LBB3_2: # Inline asm indirect target
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; PPC64LE-NEXT: # %return_early
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; PPC64LE-NEXT: # Label of block must be emitted
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; PPC64LE-NEXT: li r3, 0
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; PPC64LE-NEXT: b .LBB3_1
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;
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; PPC64BE-LABEL: ClobberLR_BR:
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; PPC64BE: # %bb.0: # %entry
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; PPC64BE-NEXT: mflr r0
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; PPC64BE-NEXT: stdu r1, -48(r1)
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; PPC64BE-NEXT: std r0, 64(r1)
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; PPC64BE-NEXT: #APP
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; PPC64BE-NEXT: nop
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; PPC64BE-NEXT: #NO_APP
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; PPC64BE-NEXT: .LBB3_1: # %return
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; PPC64BE-NEXT: addi r1, r1, 48
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; PPC64BE-NEXT: ld r0, 16(r1)
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; PPC64BE-NEXT: mtlr r0
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; PPC64BE-NEXT: blr
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; PPC64BE-NEXT: .LBB3_2: # Inline asm indirect target
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; PPC64BE-NEXT: # %return_early
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; PPC64BE-NEXT: # Label of block must be emitted
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; PPC64BE-NEXT: li r3, 0
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; PPC64BE-NEXT: b .LBB3_1
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entry:
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callbr void asm sideeffect "nop", "!i,~{lr}"()
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to label %return [label %return_early]
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return_early:
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br label %return
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return:
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%retval.0 = phi i32 [ 0, %return_early ], [ %in, %entry ]
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ret i32 %retval.0
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}
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define dso_local signext i32 @ClobberR5_BR(i32 signext %in) #0 {
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; PPC64LE-LABEL: ClobberR5_BR:
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; PPC64LE: # %bb.0: # %entry
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; PPC64LE-NEXT: #APP
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; PPC64LE-NEXT: nop
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; PPC64LE-NEXT: #NO_APP
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; PPC64LE-NEXT: # %bb.1: # %return
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; PPC64LE-NEXT: blr
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; PPC64LE-NEXT: .LBB4_2: # Inline asm indirect target
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; PPC64LE-NEXT: # %return_early
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; PPC64LE-NEXT: # Label of block must be emitted
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; PPC64LE-NEXT: li r3, 0
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; PPC64LE-NEXT: blr
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;
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; PPC64BE-LABEL: ClobberR5_BR:
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; PPC64BE: # %bb.0: # %entry
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; PPC64BE-NEXT: #APP
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; PPC64BE-NEXT: nop
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; PPC64BE-NEXT: #NO_APP
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; PPC64BE-NEXT: # %bb.1: # %return
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; PPC64BE-NEXT: blr
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; PPC64BE-NEXT: .LBB4_2: # Inline asm indirect target
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; PPC64BE-NEXT: # %return_early
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; PPC64BE-NEXT: # Label of block must be emitted
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; PPC64BE-NEXT: li r3, 0
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; PPC64BE-NEXT: blr
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entry:
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callbr void asm sideeffect "nop", "!i,~{r5}"()
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to label %return [label %return_early]
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return_early:
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br label %return
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return:
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%retval.0 = phi i32 [ 0, %return_early ], [ %in, %entry ]
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ret i32 %retval.0
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}
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define dso_local void @DefLR() local_unnamed_addr #0 {
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; PPC64LE-LABEL: DefLR:
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; PPC64LE: # %bb.0: # %entry
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; PPC64LE-NEXT: mflr r0
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; PPC64LE-NEXT: stdu r1, -32(r1)
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; PPC64LE-NEXT: std r0, 48(r1)
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; PPC64LE-NEXT: #APP
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; PPC64LE-NEXT: #NO_APP
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; PPC64LE-NEXT: addi r1, r1, 32
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; PPC64LE-NEXT: ld r0, 16(r1)
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; PPC64LE-NEXT: mtlr r0
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; PPC64LE-NEXT: blr
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;
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; PPC64BE-LABEL: DefLR:
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; PPC64BE: # %bb.0: # %entry
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; PPC64BE-NEXT: mflr r0
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; PPC64BE-NEXT: stdu r1, -48(r1)
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; PPC64BE-NEXT: std r0, 64(r1)
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; PPC64BE-NEXT: #APP
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; PPC64BE-NEXT: #NO_APP
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; PPC64BE-NEXT: addi r1, r1, 48
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; PPC64BE-NEXT: ld r0, 16(r1)
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; PPC64BE-NEXT: mtlr r0
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; PPC64BE-NEXT: blr
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entry:
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tail call i64 asm sideeffect "", "={lr}"()
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ret void
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}
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define dso_local void @EarlyClobberLR() local_unnamed_addr #0 {
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; PPC64LE-LABEL: EarlyClobberLR:
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; PPC64LE: # %bb.0: # %entry
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; PPC64LE-NEXT: mflr r0
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; PPC64LE-NEXT: stdu r1, -32(r1)
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; PPC64LE-NEXT: std r0, 48(r1)
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; PPC64LE-NEXT: #APP
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; PPC64LE-NEXT: #NO_APP
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; PPC64LE-NEXT: addi r1, r1, 32
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; PPC64LE-NEXT: ld r0, 16(r1)
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; PPC64LE-NEXT: mtlr r0
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; PPC64LE-NEXT: blr
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;
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; PPC64BE-LABEL: EarlyClobberLR:
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; PPC64BE: # %bb.0: # %entry
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; PPC64BE-NEXT: mflr r0
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; PPC64BE-NEXT: stdu r1, -48(r1)
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; PPC64BE-NEXT: std r0, 64(r1)
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; PPC64BE-NEXT: #APP
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; PPC64BE-NEXT: #NO_APP
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; PPC64BE-NEXT: addi r1, r1, 48
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; PPC64BE-NEXT: ld r0, 16(r1)
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; PPC64BE-NEXT: mtlr r0
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; PPC64BE-NEXT: blr
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entry:
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tail call i64 asm sideeffect "", "=&{lr}"()
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ret void
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}
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define dso_local void @ClobberMulti() local_unnamed_addr #0 {
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; PPC64LE-LABEL: ClobberMulti:
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; PPC64LE: # %bb.0: # %entry
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; PPC64LE-NEXT: mflr r0
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; PPC64LE-NEXT: std r15, -136(r1) # 8-byte Folded Spill
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; PPC64LE-NEXT: std r16, -128(r1) # 8-byte Folded Spill
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; PPC64LE-NEXT: stdu r1, -176(r1)
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; PPC64LE-NEXT: std r0, 192(r1)
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; PPC64LE-NEXT: #APP
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; PPC64LE-NEXT: #NO_APP
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; PPC64LE-NEXT: addi r1, r1, 176
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; PPC64LE-NEXT: ld r0, 16(r1)
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; PPC64LE-NEXT: ld r16, -128(r1) # 8-byte Folded Reload
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; PPC64LE-NEXT: ld r15, -136(r1) # 8-byte Folded Reload
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; PPC64LE-NEXT: mtlr r0
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; PPC64LE-NEXT: blr
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;
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; PPC64BE-LABEL: ClobberMulti:
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; PPC64BE: # %bb.0: # %entry
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; PPC64BE-NEXT: mflr r0
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; PPC64BE-NEXT: stdu r1, -192(r1)
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; PPC64BE-NEXT: std r0, 208(r1)
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; PPC64BE-NEXT: std r15, 56(r1) # 8-byte Folded Spill
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; PPC64BE-NEXT: std r16, 64(r1) # 8-byte Folded Spill
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; PPC64BE-NEXT: #APP
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; PPC64BE-NEXT: #NO_APP
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; PPC64BE-NEXT: ld r16, 64(r1) # 8-byte Folded Reload
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; PPC64BE-NEXT: ld r15, 56(r1) # 8-byte Folded Reload
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; PPC64BE-NEXT: addi r1, r1, 192
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; PPC64BE-NEXT: ld r0, 16(r1)
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; PPC64BE-NEXT: mtlr r0
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; PPC64BE-NEXT: blr
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entry:
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tail call void asm sideeffect "", "~{lr},~{r15},~{r16}"()
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ret void
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}
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attributes #0 = { nounwind }
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