76274eb2b3
Reverting because mis-compiles: - https://github.com/llvm/llvm-project/pull/131837 - https://github.com/llvm/llvm-project/pull/146320 - https://github.com/llvm/llvm-project/pull/146337
27 lines
1.1 KiB
LLVM
27 lines
1.1 KiB
LLVM
; RUN: llc -disable-ppc-vsx-fma-mutation=false -mcpu=pwr10 -verify-machineinstrs \
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; RUN: -ppc-asm-full-reg-names -mtriple powerpc64-ibm-aix7.2.0.0 < %s | FileCheck %s
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target datalayout = "E-m:a-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512"
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define void @initial(<2 x double> %0){
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entry:
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%1 = fmul <2 x double> %0, zeroinitializer
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br label %for.cond251.preheader.lr.ph
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for.cond251.preheader.lr.ph: ; preds = %for.cond251.preheader.lr.ph, %entry
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%2 = phi double [ %3, %for.cond251.preheader.lr.ph ], [ 0.000000e+00, %entry ]
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%3 = phi double [ %7, %for.cond251.preheader.lr.ph ], [ 0.000000e+00, %entry ]
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%add737 = fadd double %3, %2
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%4 = insertelement <2 x double> zeroinitializer, double %add737, i64 0
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%5 = fmul contract <2 x double> %4, zeroinitializer
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%6 = fadd contract <2 x double> %1, %5
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%7 = extractelement <2 x double> %6, i64 0
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br label %for.cond251.preheader.lr.ph
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}
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; CHECK: xsadddp f4, f3, f4
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; CHECK-NEXT: xxmrghd vs5, vs4, vs2
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; CHECK-NEXT: fmr f4, f3
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; CHECK-NEXT: xvmaddmdp vs5, vs0, vs1
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; CHECK-NEXT: fmr f3, f5
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