9757f4f2dd
These changes to address issue https://github.com/llvm/llvm-project/issues/55857. Since R30/S30 is used as pointer (32 bits) for GOT Table in the ppc32 ABI, remove it from the SPE callee save register when PIC is enabled. This prevents emitting the SPE load and store for S30 and S31 regs. Differential revision: https://reviews.llvm.org/D127495
19 lines
770 B
LLVM
19 lines
770 B
LLVM
; RUN: llc --relocation-model=pic \
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; RUN: -mtriple=ppc32 < %s | FileCheck %s
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@g = global i32 10, align 4
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; Function Attrs: noinline nounwind optnone uwtable
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define i32 @main() #0 {
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; CHECK-LABEL: main:
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; CHECK-NOT: evstdd
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entry:
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%retval = alloca i32, align 4
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store i32 0, ptr %retval, align 4
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%0 = load i32, ptr @g, align 4
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ret i32 %0
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}
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attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="e500" "target-features"="+spe,-altivec,-bpermd,-crbits,-crypto,-direct-move,-extdiv,-htm,-isa-v206-instructions,-isa-v207-instructions,-isa-v30-instructions,-power8-vector,-power9-vector,-privileged,-quadword-atomics,-rop-protect,-vsx" }
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