a51712751c
Utilize common API in PPCTargetParser (https://github.com/llvm/llvm-project/pull/97541) to set default CPU with same interfaces for LLC. This will update AIX default CPU to pwr7 and LoP powerppc64 default CPU to ppc64.
58 lines
1.9 KiB
LLVM
58 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc < %s -start-before=codegenprepare -verify-machineinstrs -ppc-asm-full-reg-names \
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; RUN: -mcpu=ppc -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s
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%struct.anon = type { i32 }
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@b = local_unnamed_addr global %struct.anon { i32 -1 }, align 4
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@g = local_unnamed_addr global [1 x i1] zeroinitializer, align 1
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define noundef signext i32 @main() {
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; CHECK-LABEL: main:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: ld r3, L..C0(r2) # @b
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; CHECK-NEXT: lwz r3, 0(r3)
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; CHECK-NEXT: andi. r4, r3, 65535
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; CHECK-NEXT: bne cr0, L..BB0_4
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; CHECK-NEXT: # %bb.1: # %lor.rhs.i.i
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; CHECK-NEXT: extsw r4, r3
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; CHECK-NEXT: neg r5, r4
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; CHECK-NEXT: rldicl r5, r5, 1, 63
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; CHECK-NEXT: xori r5, r5, 1
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; CHECK-NEXT: cmpw r4, r5
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; CHECK-NEXT: crnot 4*cr5+lt, eq
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; CHECK-NEXT: li r4, 1
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; CHECK-NEXT: bc 12, 4*cr5+lt, L..BB0_3
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; CHECK-NEXT: # %bb.2: # %lor.rhs.i.i
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; CHECK-NEXT: li r4, 0
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; CHECK-NEXT: L..BB0_3: # %lor.rhs.i.i
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; CHECK-NEXT: ld r5, L..C1(r2) # @g
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; CHECK-NEXT: stb r4, 0(r5)
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; CHECK-NEXT: L..BB0_4: # %g.exit
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; CHECK-NEXT: ld r4, L..C1(r2) # @g
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; CHECK-NEXT: neg r3, r3
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; CHECK-NEXT: rldicl r5, r3, 1, 63
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; CHECK-NEXT: li r3, 0
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; CHECK-NEXT: stb r5, 0(r4)
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; CHECK-NEXT: blr
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entry:
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%0 = load i32, ptr @b, align 4
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%conv4.i = sext i32 %0 to i64
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%cmp.i = icmp slt i32 %0, 1
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%conv.i = zext i1 %cmp.i to i32
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%cmp1.i = icmp ne i32 %0, %conv.i
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%conv3.i = trunc i32 %0 to i16
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%tobool.not.i.i = icmp eq i16 %conv3.i, 0
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br i1 %tobool.not.i.i, label %lor.rhs.i.i, label %g.exit
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lor.rhs.i.i: ; preds = %entry
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store i1 %cmp1.i, ptr @g, align 1
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br label %g.exit
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g.exit: ; preds = %lor.end.i.i
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%4 = trunc i64 %conv4.i to i32
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%cmp.i9.i = icmp sgt i32 %4, 0
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store i1 %cmp.i9.i, ptr @g, align 1
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ret i32 0
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}
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