2484060ad9
Any kill flags that were present for the old register are not valid for the replacement and the replacement may have extended the live range of the replacement register.
44 lines
1.5 KiB
YAML
44 lines
1.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc %s -mtriple=riscv32 -run-pass=riscv-fold-mem-offset -verify-machineinstrs -o - | FileCheck %s
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---
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name: crash
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tracksRegLiveness: true
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noPhis: false
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isSSA: true
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noVRegs: false
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hasFakeUses: false
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: crash
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[COPY]], 3
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; CHECK-NEXT: [[ADD:%[0-9]+]]:gpr = ADD killed [[SLLI]], [[COPY1]]
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; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 23
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; CHECK-NEXT: [[ADD1:%[0-9]+]]:gpr = ADD [[ADD]], [[LUI]]
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; CHECK-NEXT: [[ADD2:%[0-9]+]]:gpr = ADD [[ADD]], [[LUI]]
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; CHECK-NEXT: [[LW:%[0-9]+]]:gpr = LW killed [[ADD2]], 1792
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; CHECK-NEXT: [[LW1:%[0-9]+]]:gpr = LW killed [[ADD1]], 1796
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; CHECK-NEXT: $x10 = COPY [[LW]]
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; CHECK-NEXT: $x11 = COPY [[LW1]]
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; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
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%1:gpr = COPY $x11
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%0:gpr = COPY $x10
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%3:gpr = SLLI %1, 3
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%4:gpr = ADD killed %3, %0
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%5:gpr = LUI 23
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%6:gpr = ADDI %5, 1792
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%7:gpr = ADD %4, killed %6
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%8:gpr = ADD %4, %5
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%9:gpr = LW killed %8, 1792
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%10:gpr = LW killed %7, 4
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$x10 = COPY %9
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$x11 = COPY %10
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PseudoRET implicit $x10, implicit $x11
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...
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