059722da5e
This reverts commit 9cc8442a2b438962883bbbfd8ff62ad4b1a2b95d. This reverts commit 859c871184bdfdebb47b5c7ec5e59348e0534e0b. A performance regression was reported on the original review. There appears to have been an unexpected interaction here. Reverting during investigation.
135 lines
4.3 KiB
LLVM
135 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=riscv32 -mattr=+zfinx -target-abi=ilp32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32FINX %s
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; RUN: llc -mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64FINX %s
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@gf = external global float
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define float @constraint_r_float(float %a) nounwind {
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; RV32FINX-LABEL: constraint_r_float:
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; RV32FINX: # %bb.0:
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; RV32FINX-NEXT: lui a1, %hi(gf)
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; RV32FINX-NEXT: lw a1, %lo(gf)(a1)
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; RV32FINX-NEXT: #APP
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; RV32FINX-NEXT: fadd.s a0, a0, a1
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; RV32FINX-NEXT: #NO_APP
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; RV32FINX-NEXT: ret
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;
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; RV64FINX-LABEL: constraint_r_float:
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; RV64FINX: # %bb.0:
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; RV64FINX-NEXT: lui a1, %hi(gf)
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; RV64FINX-NEXT: lw a1, %lo(gf)(a1)
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; RV64FINX-NEXT: #APP
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; RV64FINX-NEXT: fadd.s a0, a0, a1
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; RV64FINX-NEXT: #NO_APP
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; RV64FINX-NEXT: ret
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%1 = load float, ptr @gf
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%2 = tail call float asm "fadd.s $0, $1, $2", "=r,r,r"(float %a, float %1)
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ret float %2
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}
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define float @constraint_cr_float(float %a) nounwind {
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; RV32FINX-LABEL: constraint_cr_float:
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; RV32FINX: # %bb.0:
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; RV32FINX-NEXT: lui a1, %hi(gf)
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; RV32FINX-NEXT: lw a1, %lo(gf)(a1)
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; RV32FINX-NEXT: #APP
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; RV32FINX-NEXT: fadd.s a0, a0, a1
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; RV32FINX-NEXT: #NO_APP
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; RV32FINX-NEXT: ret
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;
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; RV64FINX-LABEL: constraint_cr_float:
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; RV64FINX: # %bb.0:
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; RV64FINX-NEXT: lui a1, %hi(gf)
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; RV64FINX-NEXT: lw a1, %lo(gf)(a1)
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; RV64FINX-NEXT: #APP
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; RV64FINX-NEXT: fadd.s a0, a0, a1
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; RV64FINX-NEXT: #NO_APP
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; RV64FINX-NEXT: ret
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%1 = load float, ptr @gf
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%2 = tail call float asm "fadd.s $0, $1, $2", "=^cr,cr,cr"(float %a, float %1)
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ret float %2
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}
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define float @constraint_float_abi_name(float %a) nounwind {
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; RV32FINX-LABEL: constraint_float_abi_name:
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; RV32FINX: # %bb.0:
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; RV32FINX-NEXT: addi sp, sp, -16
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; RV32FINX-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
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; RV32FINX-NEXT: lui a1, %hi(gf)
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; RV32FINX-NEXT: lw s0, %lo(gf)(a1)
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; RV32FINX-NEXT: # kill: def $x10_w killed $x10_w def $x10
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; RV32FINX-NEXT: #APP
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; RV32FINX-NEXT: fadd.s t0, a0, s0
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; RV32FINX-NEXT: #NO_APP
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; RV32FINX-NEXT: mv a0, t0
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; RV32FINX-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
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; RV32FINX-NEXT: addi sp, sp, 16
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; RV32FINX-NEXT: ret
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;
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; RV64FINX-LABEL: constraint_float_abi_name:
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; RV64FINX: # %bb.0:
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; RV64FINX-NEXT: addi sp, sp, -16
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; RV64FINX-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
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; RV64FINX-NEXT: lui a1, %hi(gf)
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; RV64FINX-NEXT: lw s0, %lo(gf)(a1)
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; RV64FINX-NEXT: # kill: def $x10_w killed $x10_w def $x10
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; RV64FINX-NEXT: #APP
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; RV64FINX-NEXT: fadd.s t0, a0, s0
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; RV64FINX-NEXT: #NO_APP
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; RV64FINX-NEXT: mv a0, t0
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; RV64FINX-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
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; RV64FINX-NEXT: addi sp, sp, 16
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; RV64FINX-NEXT: ret
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%1 = load float, ptr @gf
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%2 = tail call float asm "fadd.s $0, $1, $2", "={t0},{a0},{s0}"(float %a, float %1)
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ret float %2
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}
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define float @constraint_f_float(float %a) nounwind {
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; RV32FINX-LABEL: constraint_f_float:
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; RV32FINX: # %bb.0:
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; RV32FINX-NEXT: lui a1, %hi(gf)
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; RV32FINX-NEXT: lw a1, %lo(gf)(a1)
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; RV32FINX-NEXT: #APP
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; RV32FINX-NEXT: fadd.s a0, a0, a1
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; RV32FINX-NEXT: #NO_APP
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; RV32FINX-NEXT: ret
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;
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; RV64FINX-LABEL: constraint_f_float:
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; RV64FINX: # %bb.0:
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; RV64FINX-NEXT: lui a1, %hi(gf)
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; RV64FINX-NEXT: lw a1, %lo(gf)(a1)
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; RV64FINX-NEXT: #APP
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; RV64FINX-NEXT: fadd.s a0, a0, a1
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; RV64FINX-NEXT: #NO_APP
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; RV64FINX-NEXT: ret
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%1 = load float, ptr @gf
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%2 = tail call float asm "fadd.s $0, $1, $2", "=f,f,f"(float %a, float %1)
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ret float %2
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}
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define float @constraint_cf_float(float %a) nounwind {
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; RV32FINX-LABEL: constraint_cf_float:
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; RV32FINX: # %bb.0:
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; RV32FINX-NEXT: lui a1, %hi(gf)
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; RV32FINX-NEXT: lw a1, %lo(gf)(a1)
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; RV32FINX-NEXT: #APP
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; RV32FINX-NEXT: fadd.s a0, a0, a1
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; RV32FINX-NEXT: #NO_APP
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; RV32FINX-NEXT: ret
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;
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; RV64FINX-LABEL: constraint_cf_float:
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; RV64FINX: # %bb.0:
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; RV64FINX-NEXT: lui a1, %hi(gf)
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; RV64FINX-NEXT: lw a1, %lo(gf)(a1)
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; RV64FINX-NEXT: #APP
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; RV64FINX-NEXT: fadd.s a0, a0, a1
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; RV64FINX-NEXT: #NO_APP
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; RV64FINX-NEXT: ret
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%1 = load float, ptr @gf
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%2 = tail call float asm "fadd.s $0, $1, $2", "=^cf,cf,cf"(float %a, float %1)
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ret float %2
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}
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