
Previously we used memory like we do to move between GPRs and FPR64 with the D extension on RV32. We can instead use REG_SEQUENCE/EXTRACT_SUBREG to inform register allocation how to do the copy without memory.
14 lines
479 B
LLVM
14 lines
479 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32 < %s \
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; RUN: | FileCheck %s
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define <2 x double> @v2f64(<2 x double> %x, <2 x double> %y) nounwind {
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; CHECK-LABEL: v2f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fadd.d a2, a2, a6
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; CHECK-NEXT: fadd.d a0, a0, a4
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; CHECK-NEXT: ret
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%1 = fadd <2 x double> %x, %y
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ret <2 x double> %1
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}
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