718838d128
Implemented the asint16 function and added test cases for codegen, Sema, and SPIR-V backend. fixes https://github.com/llvm/llvm-project/issues/99184 --------- Co-authored-by: Ashley Coleman <ascoleman@microsoft.com>
32 lines
1.3 KiB
LLVM
32 lines
1.3 KiB
LLVM
; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK-SPIRV-DAG: %[[#TyInt32:]] = OpTypeInt 32 0
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; CHECK-SPIRV-DAG: %[[#TyInt16:]] = OpTypeInt 16 0
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; CHECK-SPIRV-DAG: %[[#TyHalf:]] = OpTypeFloat 16
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; CHECK-SPIRV-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#TyHalf]] 4
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; CHECK-SPIRV-DAG: %[[#Arg32:]] = OpFunctionParameter %[[#TyInt32]]
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; CHECK-SPIRV-DAG: %[[#Arg16:]] = OpUConvert %[[#TyInt16]] %[[#Arg32]]
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; CHECK-SPIRV-DAG: %[[#ValHalf:]] = OpBitcast %[[#TyHalf]] %[[#Arg16:]]
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; CHECK-SPIRV-DAG: %[[#ValHalf2:]] = OpFMul %[[#TyHalf]] %[[#ValHalf]] %[[#ValHalf]]
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; CHECK-SPIRV-DAG: %[[#Res16:]] = OpBitcast %[[#TyInt16]] %[[#ValHalf2]]
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; CHECK-SPIRV-DAG: OpReturnValue %[[#Res16]]
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define i16 @foo(i32 %arg) {
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entry:
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%op16 = trunc i32 %arg to i16
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%val = bitcast i16 %op16 to half
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%val2 = fmul half %val, %val
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%res = bitcast half %val2 to i16
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ret i16 %res
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}
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define <4 x i16> @test_vector_half4(<4 x half> nofpclass(nan inf) %p1) {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_float_16]]
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; CHECK: %[[#Res1:]] = OpBitcast %[[#vec4_int_16]] %[[#arg0]]
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%0 = bitcast <4 x half> %p1 to <4 x i16>
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; CHECK: OpReturnValue %[[#Res1]]
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ret <4 x i16> %0
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}
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