cf3d6fded9
Many tests had this flag removed because of the G_BITCAST emission issue. Now that the PR is merged, we can re-enable this additional check. 2 tests (basic_int_types) just have the TODO removed because they are not useful for SPIR-V as-is: SPIR-V requires reg2mem/mem2reg to run, which removes all the body. Integers are used in other spirv tests, and seems like testing for spirv32/64 and relying on others for the logical target coverage should be fine. Signed-off-by: Nathan Gauër <brioche@google.com>
127 lines
6.1 KiB
LLVM
127 lines
6.1 KiB
LLVM
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
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; CHECK-DAG: %[[#float_64:]] = OpTypeFloat 64
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; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 32
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; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
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; CHECK-DAG: %[[#vec2_float_16:]] = OpTypeVector %[[#float_16]] 2
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; CHECK-DAG: %[[#vec2_float_32:]] = OpTypeVector %[[#float_32]] 2
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; CHECK-DAG: %[[#vec2_float_64:]] = OpTypeVector %[[#float_64]] 2
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; CHECK-DAG: %[[#vec3_float_16:]] = OpTypeVector %[[#float_16]] 3
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; CHECK-DAG: %[[#vec3_float_32:]] = OpTypeVector %[[#float_32]] 3
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; CHECK-DAG: %[[#vec3_float_64:]] = OpTypeVector %[[#float_64]] 3
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; CHECK-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 4
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; CHECK-DAG: %[[#vec4_float_32:]] = OpTypeVector %[[#float_32]] 4
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; CHECK-DAG: %[[#vec4_float_64:]] = OpTypeVector %[[#float_64]] 4
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; CHECK-DAG: %[[#const_f64_1:]] = OpConstant %[[#float_64]] 1
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; CHECK-DAG: %[[#const_f32_1:]] = OpConstant %[[#float_32]] 1
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; CHECK-DAG: %[[#const_f16_1:]] = OpConstant %[[#float_16]] 1
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; CHECK-DAG: %[[#vec2_const_ones_f16:]] = OpConstantComposite %[[#vec2_float_16]] %[[#const_f16_1]] %[[#const_f16_1]]
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; CHECK-DAG: %[[#vec3_const_ones_f16:]] = OpConstantComposite %[[#vec3_float_16]] %[[#const_f16_1]] %[[#const_f16_1]] %[[#const_f16_1]]
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; CHECK-DAG: %[[#vec4_const_ones_f16:]] = OpConstantComposite %[[#vec4_float_16]] %[[#const_f16_1]] %[[#const_f16_1]] %[[#const_f16_1]] %[[#const_f16_1]]
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; CHECK-DAG: %[[#vec2_const_ones_f32:]] = OpConstantComposite %[[#vec2_float_32]] %[[#const_f32_1]] %[[#const_f32_1]]
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; CHECK-DAG: %[[#vec3_const_ones_f32:]] = OpConstantComposite %[[#vec3_float_32]] %[[#const_f32_1]] %[[#const_f32_1]] %[[#const_f32_1]]
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; CHECK-DAG: %[[#vec4_const_ones_f32:]] = OpConstantComposite %[[#vec4_float_32]] %[[#const_f32_1]] %[[#const_f32_1]] %[[#const_f32_1]] %[[#const_f32_1]]
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; CHECK-DAG: %[[#vec2_const_ones_f64:]] = OpConstantComposite %[[#vec2_float_64]] %[[#const_f64_1]] %[[#const_f64_1]]
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; CHECK-DAG: %[[#vec3_const_ones_f64:]] = OpConstantComposite %[[#vec3_float_64]] %[[#const_f64_1]] %[[#const_f64_1]] %[[#const_f64_1]]
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; CHECK-DAG: %[[#vec4_const_ones_f64:]] = OpConstantComposite %[[#vec4_float_64]] %[[#const_f64_1]] %[[#const_f64_1]] %[[#const_f64_1]] %[[#const_f64_1]]
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define spir_func noundef half @test_rcp_half(half noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#float_16]]
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; CHECK: OpFDiv %[[#float_16]] %[[#const_f16_1]] %[[#arg0]]
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%hlsl.rcp = fdiv half 0xH3C00, %p0
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ret half %hlsl.rcp
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}
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define spir_func noundef <2 x half> @test_rcp_half2(<2 x half> noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec2_float_16]]
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; CHECK: OpFDiv %[[#vec2_float_16]] %[[#vec2_const_ones_f16]] %[[#arg0]]
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%hlsl.rcp = fdiv <2 x half> <half 0xH3C00, half 0xH3C00>, %p0
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ret <2 x half> %hlsl.rcp
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}
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define spir_func noundef <3 x half> @test_rcp_half3(<3 x half> noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec3_float_16]]
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; CHECK: OpFDiv %[[#vec3_float_16]] %[[#vec3_const_ones_f16]] %[[#arg0]]
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%hlsl.rcp = fdiv <3 x half> <half 0xH3C00, half 0xH3C00, half 0xH3C00>, %p0
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ret <3 x half> %hlsl.rcp
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}
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define spir_func noundef <4 x half> @test_rcp_half4(<4 x half> noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_float_16]]
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; CHECK: OpFDiv %[[#vec4_float_16]] %[[#vec4_const_ones_f16]] %[[#arg0]]
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%hlsl.rcp = fdiv <4 x half> <half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00>, %p0
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ret <4 x half> %hlsl.rcp
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}
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define spir_func noundef float @test_rcp_float(float noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#float_32]]
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; CHECK: OpFDiv %[[#float_32]] %[[#const_f32_1]] %[[#arg0]]
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%hlsl.rcp = fdiv float 1.000000e+00, %p0
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ret float %hlsl.rcp
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}
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define spir_func noundef <2 x float> @test_rcp_float2(<2 x float> noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec2_float_32]]
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; CHECK: OpFDiv %[[#vec2_float_32]] %[[#vec2_const_ones_f32]] %[[#arg0]]
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%hlsl.rcp = fdiv <2 x float> <float 1.000000e+00, float 1.000000e+00>, %p0
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ret <2 x float> %hlsl.rcp
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}
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define spir_func noundef <3 x float> @test_rcp_float3(<3 x float> noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec3_float_32]]
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; CHECK: OpFDiv %[[#vec3_float_32]] %[[#vec3_const_ones_f32]] %[[#arg0]]
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%hlsl.rcp = fdiv <3 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, %p0
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ret <3 x float> %hlsl.rcp
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}
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define spir_func noundef <4 x float> @test_rcp_float4(<4 x float> noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_float_32]]
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; CHECK: OpFDiv %[[#vec4_float_32]] %[[#vec4_const_ones_f32]] %[[#arg0]]
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%hlsl.rcp = fdiv <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, %p0
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ret <4 x float> %hlsl.rcp
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}
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define spir_func noundef double @test_rcp_double(double noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#float_64]]
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; CHECK: OpFDiv %[[#float_64]] %[[#const_f64_1]] %[[#arg0]]
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%hlsl.rcp = fdiv double 1.000000e+00, %p0
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ret double %hlsl.rcp
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}
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define spir_func noundef <2 x double> @test_rcp_double2(<2 x double> noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec2_float_64:]]
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; CHECK: OpFDiv %[[#vec2_float_64]] %[[#vec2_const_ones_f64]] %[[#arg0]]
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%hlsl.rcp = fdiv <2 x double> <double 1.000000e+00, double 1.000000e+00>, %p0
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ret <2 x double> %hlsl.rcp
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}
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define spir_func noundef <3 x double> @test_rcp_double3(<3 x double> noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec3_float_64:]]
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; CHECK: OpFDiv %[[#vec3_float_64]] %[[#vec3_const_ones_f64]] %[[#arg0]]
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%hlsl.rcp = fdiv <3 x double> <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00>, %p0
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ret <3 x double> %hlsl.rcp
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}
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define spir_func noundef <4 x double> @test_rcp_double4(<4 x double> noundef %p0) #0 {
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entry:
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; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_float_64]]
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; CHECK: OpFDiv %[[#vec4_float_64]] %[[#vec4_const_ones_f64]] %[[#arg0]]
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%hlsl.rcp = fdiv <4 x double> <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00>, %p0
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ret <4 x double> %hlsl.rcp
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}
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