67d3ef74b3
This PR continues https://github.com/llvm/llvm-project/pull/101732 changes in virtual register processing aimed to improve correctness of emitted MIR between passes from the perspective of MachineVerifier. Namely, the following changes are introduced: * register classes (lib/Target/SPIRV/SPIRVRegisterInfo.td) and instruction patterns (lib/Target/SPIRV/SPIRVInstrInfo.td) are corrected and simplified (by removing unnecessary sophisticated options) -- e.g., this PR gets rid of duplicating 32/64 bits patterns, removes ANYID register class and simplifies definition of the rest of register classes, * hardcoded LLT scalar types in passes before instruction selection are corrected -- the goal is to have correct bit width before instruction selection, and use 64 bits registers for pattern matching in the instruction selection pass; 32-bit registers remain where they are described in such terms by SPIR-V specification (like, for example, creation of virtual registers for scope/mem semantics operands), * rework virtual register type/class assignment for calls/builtins lowering, * a series of minor changes to fix validity of emitted code between passes: - ensure that that bitcast changes the type, - fix the pattern for instruction selection for OpExtInst, - simplify inline asm operands usage, - account for arbitrary integer sizes / update legalizer rules; * add '-verify-machineinstrs' to existed test cases. See also https://github.com/llvm/llvm-project/issues/88129 that this PR may resolve. This PR fixes a great number of issues reported by MachineVerifier and, as a result, reduces a number of failed test cases for the mode with expensive checks set on from ~200 to ~57.
25 lines
972 B
LLVM
25 lines
972 B
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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target triple = "spirv64-unknown-unknown"
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; CHECK-DAG: %[[#VOID:]] = OpTypeVoid
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; CHECK-DAG: %[[#INT32:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#STRUCT1:]] = OpTypeStruct %[[#INT32]]
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; CHECK-DAG: %[[#CONST:]] = OpConstant %[[#INT32]] 7
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; CHECK-DAG: %[[#ARRAY:]] = OpTypeArray %[[#STRUCT1]] %[[#CONST]]
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; CHECK-DAG: %[[#STRUCT2:]] = OpTypeStruct %[[#ARRAY]]
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; CHECK-DAG: %[[#PTR:]] = OpTypePointer Function %[[#STRUCT2]]
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; CHECK: %[[#FUNC:]] = OpTypeFunction %[[#VOID]] %[[#PTR]]
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; CHECK: %[[#]] = OpFunction %[[#VOID]] None %[[#FUNC]]
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; CHECK: %[[#]] = OpFunctionParameter %[[#PTR]]
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%struct.S = type { i32 }
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%struct.__wrapper_class = type { [7 x %struct.S] }
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define spir_kernel void @foo(ptr noundef byref(%struct.__wrapper_class) align 4 %_arg_Arr) {
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entry:
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ret void
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}
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