a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
188 lines
5.9 KiB
LLVM
188 lines
5.9 KiB
LLVM
; Test 64-bit floating-point comparison. The tests assume a z10 implementation
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; of select, using conditional branches rather than LOCGR.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
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; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs\
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; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s
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declare double @foo()
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; Check comparison with registers.
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define i64 @f1(i64 %a, i64 %b, double %f1, double %f2) {
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; CHECK-LABEL: f1:
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; CHECK: cdbr %f0, %f2
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; CHECK-SCALAR-NEXT: ber %r14
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; CHECK-SCALAR: lgr %r2, %r3
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; CHECK-VECTOR-NEXT: locgrne %r2, %r3
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; CHECK: br %r14
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%cond = fcmp oeq double %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check the low end of the CDB range.
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define i64 @f2(i64 %a, i64 %b, double %f1, ptr %ptr) {
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; CHECK-LABEL: f2:
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; CHECK: cdb %f0, 0(%r4)
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; CHECK-SCALAR-NEXT: ber %r14
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; CHECK-SCALAR: lgr %r2, %r3
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; CHECK-VECTOR-NEXT: locgrne %r2, %r3
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; CHECK: br %r14
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%f2 = load double, ptr %ptr
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%cond = fcmp oeq double %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check the high end of the aligned CDB range.
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define i64 @f3(i64 %a, i64 %b, double %f1, ptr %base) {
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; CHECK-LABEL: f3:
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; CHECK: cdb %f0, 4088(%r4)
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; CHECK-SCALAR-NEXT: ber %r14
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; CHECK-SCALAR: lgr %r2, %r3
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; CHECK-VECTOR-NEXT: locgrne %r2, %r3
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; CHECK: br %r14
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%ptr = getelementptr double, ptr %base, i64 511
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%f2 = load double, ptr %ptr
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%cond = fcmp oeq double %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check the next doubleword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f4(i64 %a, i64 %b, double %f1, ptr %base) {
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; CHECK-LABEL: f4:
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; CHECK: aghi %r4, 4096
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; CHECK: cdb %f0, 0(%r4)
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; CHECK-SCALAR-NEXT: ber %r14
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; CHECK-SCALAR: lgr %r2, %r3
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; CHECK-VECTOR-NEXT: locgrne %r2, %r3
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; CHECK: br %r14
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%ptr = getelementptr double, ptr %base, i64 512
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%f2 = load double, ptr %ptr
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%cond = fcmp oeq double %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check negative displacements, which also need separate address logic.
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define i64 @f5(i64 %a, i64 %b, double %f1, ptr %base) {
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; CHECK-LABEL: f5:
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; CHECK: aghi %r4, -8
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; CHECK: cdb %f0, 0(%r4)
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; CHECK-SCALAR-NEXT: ber %r14
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; CHECK-SCALAR: lgr %r2, %r3
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; CHECK-VECTOR-NEXT: locgrne %r2, %r3
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; CHECK: br %r14
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%ptr = getelementptr double, ptr %base, i64 -1
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%f2 = load double, ptr %ptr
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%cond = fcmp oeq double %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check that CDB allows indices.
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define i64 @f6(i64 %a, i64 %b, double %f1, ptr %base, i64 %index) {
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; CHECK-LABEL: f6:
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; CHECK: sllg %r1, %r5, 3
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; CHECK: cdb %f0, 800(%r1,%r4)
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; CHECK-SCALAR-NEXT: ber %r14
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; CHECK-SCALAR: lgr %r2, %r3
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; CHECK-VECTOR-NEXT: locgrne %r2, %r3
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; CHECK: br %r14
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%ptr1 = getelementptr double, ptr %base, i64 %index
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%ptr2 = getelementptr double, ptr %ptr1, i64 100
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%f2 = load double, ptr %ptr2
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%cond = fcmp oeq double %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check that comparisons of spilled values can use CDB rather than CDBR.
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define double @f7(ptr %ptr0) {
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; CHECK-LABEL: f7:
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; CHECK: brasl %r14, foo@PLT
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; CHECK-SCALAR: cdb {{%f[0-9]+}}, 160(%r15)
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; CHECK: br %r14
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%ptr1 = getelementptr double, ptr %ptr0, i64 2
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%ptr2 = getelementptr double, ptr %ptr0, i64 4
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%ptr3 = getelementptr double, ptr %ptr0, i64 6
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%ptr4 = getelementptr double, ptr %ptr0, i64 8
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%ptr5 = getelementptr double, ptr %ptr0, i64 10
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%ptr6 = getelementptr double, ptr %ptr0, i64 12
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%ptr7 = getelementptr double, ptr %ptr0, i64 14
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%ptr8 = getelementptr double, ptr %ptr0, i64 16
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%ptr9 = getelementptr double, ptr %ptr0, i64 18
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%ptr10 = getelementptr double, ptr %ptr0, i64 20
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%val0 = load double, ptr %ptr0
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%val1 = load double, ptr %ptr1
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%val2 = load double, ptr %ptr2
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%val3 = load double, ptr %ptr3
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%val4 = load double, ptr %ptr4
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%val5 = load double, ptr %ptr5
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%val6 = load double, ptr %ptr6
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%val7 = load double, ptr %ptr7
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%val8 = load double, ptr %ptr8
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%val9 = load double, ptr %ptr9
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%val10 = load double, ptr %ptr10
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%ret = call double @foo()
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%cmp0 = fcmp olt double %ret, %val0
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%cmp1 = fcmp olt double %ret, %val1
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%cmp2 = fcmp olt double %ret, %val2
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%cmp3 = fcmp olt double %ret, %val3
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%cmp4 = fcmp olt double %ret, %val4
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%cmp5 = fcmp olt double %ret, %val5
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%cmp6 = fcmp olt double %ret, %val6
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%cmp7 = fcmp olt double %ret, %val7
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%cmp8 = fcmp olt double %ret, %val8
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%cmp9 = fcmp olt double %ret, %val9
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%cmp10 = fcmp olt double %ret, %val10
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%sel0 = select i1 %cmp0, double %ret, double 0.0
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%sel1 = select i1 %cmp1, double %sel0, double 1.0
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%sel2 = select i1 %cmp2, double %sel1, double 2.0
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%sel3 = select i1 %cmp3, double %sel2, double 3.0
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%sel4 = select i1 %cmp4, double %sel3, double 4.0
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%sel5 = select i1 %cmp5, double %sel4, double 5.0
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%sel6 = select i1 %cmp6, double %sel5, double 6.0
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%sel7 = select i1 %cmp7, double %sel6, double 7.0
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%sel8 = select i1 %cmp8, double %sel7, double 8.0
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%sel9 = select i1 %cmp9, double %sel8, double 9.0
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%sel10 = select i1 %cmp10, double %sel9, double 10.0
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ret double %sel10
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}
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; Check comparison with zero.
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define i64 @f8(i64 %a, i64 %b, double %f) {
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; CHECK-LABEL: f8:
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; CHECK-SCALAR: ltdbr %f0, %f0
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; CHECK-SCALAR-NEXT: ber %r14
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; CHECK-SCALAR: lgr %r2, %r3
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; CHECK-VECTOR: ltdbr %f0, %f0
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; CHECK-VECTOR-NEXT: locgrne %r2, %r3
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; CHECK: br %r14
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%cond = fcmp oeq double %f, 0.0
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check the comparison can be reversed if that allows CDB to be used,
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define i64 @f9(i64 %a, i64 %b, double %f2, ptr %ptr) {
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; CHECK-LABEL: f9:
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; CHECK: cdb %f0, 0(%r4)
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; CHECK-SCALAR-NEXT: blr %r14
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; CHECK-SCALAR: lgr %r2, %r3
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; CHECK-VECTOR-NEXT: locgrnl %r2, %r3
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; CHECK: br %r14
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%f1 = load double, ptr %ptr
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%cond = fcmp ogt double %f1, %f2
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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