9260592141
Support new intrinsics for following instrauctions. - VLDZ, VPCNT, VBRV - LCR, SCR, TSCR, FIDCR - FENCE Also clean the intrinsics implementation of a following instruction. - SVOB Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D121509
32 lines
683 B
LLVM
32 lines
683 B
LLVM
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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; Function Attrs: nounwind mustprogress
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define void @_Z6fenceiv() {
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; CHECK: fencei
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tail call void @llvm.ve.vl.fencei()
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ret void
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}
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; Function Attrs: nounwind
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declare void @llvm.ve.vl.fencei()
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; Function Attrs: nounwind mustprogress
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define void @_Z7fencem3v() {
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; CHECK: fencem 3
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tail call void @llvm.ve.vl.fencem.s(i32 3)
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ret void
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}
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; Function Attrs: nounwind
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declare void @llvm.ve.vl.fencem.s(i32)
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; Function Attrs: nounwind mustprogress
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define void @_Z7fencec7v() {
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; CHECK: fencec 7
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tail call void @llvm.ve.vl.fencec.s(i32 7)
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ret void
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}
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; Function Attrs: nounwind
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declare void @llvm.ve.vl.fencec.s(i32)
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