af4c4f4e21
65420c8041f4 introduced an ICE in combineMinNumMaxNum(...) when combineMinNumMaxNumImpl(...) returns an SDValue(). Make sure to check that a value is returned before trying to perform an FNEG on it. GitHub Issue: #60924 Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D144571
21 lines
588 B
LLVM
21 lines
588 B
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake
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; Checking for a DAGCombine ICE.
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define float @test_combinemaxnum(float %sub) #0 {
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L.entry:
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%maxnum1 = call float @llvm.maxnum.f32(float 0.000000e+00, float 0.000000e+00)
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br label %L.LB21_850
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L.LB21_850:
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%neg1 = fneg fast float %maxnum1
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%neg2 = fneg fast float %sub
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%mask = fcmp fast ule float %maxnum1, %neg2
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%maxnum2 = select i1 %mask, float %neg1, float %sub
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ret float %maxnum2
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}
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declare float @llvm.maxnum.f32(float, float)
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attributes #0 = { "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" }
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