527e453a5b
Similar to what we've done for HasMFence - this puts into place a pseudo-predicate for CLFLUSH instructions that separates it from HasSSE2 to make it easier to use CLFLUSH even when SSE/fpmath has been disabled - technically CLFLUSH has its own CPUID bit, so could be available on x86 cores entirely without SSE, but I don't think thats ever happened or likely to happen.
23 lines
838 B
LLVM
23 lines
838 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64
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; It doesn't matter if an x86-64 target has specified "no-sse2"; we still can use clflush.
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define void @clflush(ptr %p) nounwind {
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; X86-LABEL: clflush:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: clflush (%eax)
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; X86-NEXT: retl
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;
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; X64-LABEL: clflush:
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; X64: # %bb.0:
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; X64-NEXT: clflush (%rdi)
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; X64-NEXT: retq
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tail call void @llvm.x86.sse2.clflush(ptr %p)
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ret void
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}
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declare void @llvm.x86.sse2.clflush(ptr) nounwind
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