00c4be3c9e
Many backends are missing either all tests for lrint, or specifically those for f16, which currently crashes for `softPromoteHalf` targets. For a number of popular backends, do the following: * Ensure f16, f32, f64, and f128 are all covered * Ensure both a 32- and 64-bit target are tested, if relevant * Add `nounwind` to clean up CFI output * Add a test covering the above if one did not exist * Always specify the integer type in intrinsic calls There are quite a few FIXMEs here, especially for `f16`, but much of this will be resolved in the near future.
164 lines
5.0 KiB
LLVM
164 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
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; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
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; RUN: llc < %s -mtriple=i686-unknown -mattr=avx | FileCheck %s --check-prefixes=X86,X86-AVX
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; RUN: llc < %s -mtriple=i686-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-SSE
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64,X64-AVX
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64-AVX
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; FIXME: crash
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; define i32 @testmswh(half %x) nounwind {
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; entry:
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; %0 = tail call i32 @llvm.lrint.i32.f16(half %x)
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; ret i32 %0
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; }
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define i32 @testmsws(float %x) nounwind {
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; X86-NOSSE-LABEL: testmsws:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: pushl %eax
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; X86-NOSSE-NEXT: flds {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fistpl (%esp)
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; X86-NOSSE-NEXT: movl (%esp), %eax
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; X86-NOSSE-NEXT: popl %ecx
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE2-LABEL: testmsws:
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; X86-SSE2: # %bb.0: # %entry
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; X86-SSE2-NEXT: cvtss2si {{[0-9]+}}(%esp), %eax
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; X86-SSE2-NEXT: retl
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;
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; X86-AVX-LABEL: testmsws:
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; X86-AVX: # %bb.0: # %entry
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; X86-AVX-NEXT: vcvtss2si {{[0-9]+}}(%esp), %eax
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; X86-AVX-NEXT: retl
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;
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; X64-SSE-LABEL: testmsws:
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; X64-SSE: # %bb.0: # %entry
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; X64-SSE-NEXT: cvtss2si %xmm0, %eax
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; X64-SSE-NEXT: retq
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;
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; X64-AVX-LABEL: testmsws:
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; X64-AVX: # %bb.0: # %entry
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; X64-AVX-NEXT: vcvtss2si %xmm0, %eax
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; X64-AVX-NEXT: retq
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entry:
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%0 = tail call i32 @llvm.lrint.i32.f32(float %x)
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ret i32 %0
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}
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define i32 @testmswd(double %x) nounwind {
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; X86-NOSSE-LABEL: testmswd:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: pushl %eax
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; X86-NOSSE-NEXT: fldl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fistpl (%esp)
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; X86-NOSSE-NEXT: movl (%esp), %eax
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; X86-NOSSE-NEXT: popl %ecx
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE2-LABEL: testmswd:
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; X86-SSE2: # %bb.0: # %entry
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; X86-SSE2-NEXT: cvtsd2si {{[0-9]+}}(%esp), %eax
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; X86-SSE2-NEXT: retl
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;
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; X86-AVX-LABEL: testmswd:
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; X86-AVX: # %bb.0: # %entry
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; X86-AVX-NEXT: vcvtsd2si {{[0-9]+}}(%esp), %eax
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; X86-AVX-NEXT: retl
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;
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; X64-SSE-LABEL: testmswd:
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; X64-SSE: # %bb.0: # %entry
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; X64-SSE-NEXT: cvtsd2si %xmm0, %eax
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; X64-SSE-NEXT: retq
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;
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; X64-AVX-LABEL: testmswd:
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; X64-AVX: # %bb.0: # %entry
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; X64-AVX-NEXT: vcvtsd2si %xmm0, %eax
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; X64-AVX-NEXT: retq
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entry:
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%0 = tail call i32 @llvm.lrint.i32.f64(double %x)
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ret i32 %0
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}
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define i32 @testmsll(x86_fp80 %x) nounwind {
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; X86-LABEL: testmsll:
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; X86: # %bb.0: # %entry
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; X86-NEXT: pushl %eax
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; X86-NEXT: fldt {{[0-9]+}}(%esp)
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; X86-NEXT: fistpl (%esp)
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; X86-NEXT: movl (%esp), %eax
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; X86-NEXT: popl %ecx
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; X86-NEXT: retl
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;
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; X64-LABEL: testmsll:
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; X64: # %bb.0: # %entry
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; X64-NEXT: fldt {{[0-9]+}}(%rsp)
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; X64-NEXT: fistpl -{{[0-9]+}}(%rsp)
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; X64-NEXT: movl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: retq
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entry:
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%0 = tail call i32 @llvm.lrint.i32.f80(x86_fp80 %x)
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ret i32 %0
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}
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; FIXME(#44744): incorrect libcall
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define i32 @testmswq(fp128 %x) nounwind {
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; X86-NOSSE-LABEL: testmswq:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: pushl %ebp
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; X86-NOSSE-NEXT: movl %esp, %ebp
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; X86-NOSSE-NEXT: andl $-16, %esp
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; X86-NOSSE-NEXT: subl $16, %esp
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; X86-NOSSE-NEXT: pushl 20(%ebp)
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; X86-NOSSE-NEXT: pushl 16(%ebp)
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; X86-NOSSE-NEXT: pushl 12(%ebp)
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; X86-NOSSE-NEXT: pushl 8(%ebp)
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; X86-NOSSE-NEXT: calll lrintl
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; X86-NOSSE-NEXT: addl $16, %esp
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; X86-NOSSE-NEXT: movl %ebp, %esp
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; X86-NOSSE-NEXT: popl %ebp
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE2-LABEL: testmswq:
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; X86-SSE2: # %bb.0: # %entry
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; X86-SSE2-NEXT: pushl %ebp
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; X86-SSE2-NEXT: movl %esp, %ebp
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; X86-SSE2-NEXT: andl $-16, %esp
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; X86-SSE2-NEXT: subl $16, %esp
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; X86-SSE2-NEXT: pushl 20(%ebp)
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; X86-SSE2-NEXT: pushl 16(%ebp)
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; X86-SSE2-NEXT: pushl 12(%ebp)
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; X86-SSE2-NEXT: pushl 8(%ebp)
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; X86-SSE2-NEXT: calll lrintl
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; X86-SSE2-NEXT: addl $16, %esp
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; X86-SSE2-NEXT: movl %ebp, %esp
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; X86-SSE2-NEXT: popl %ebp
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; X86-SSE2-NEXT: retl
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;
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; X86-AVX-LABEL: testmswq:
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; X86-AVX: # %bb.0: # %entry
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; X86-AVX-NEXT: pushl %ebp
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; X86-AVX-NEXT: movl %esp, %ebp
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; X86-AVX-NEXT: andl $-16, %esp
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; X86-AVX-NEXT: subl $32, %esp
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; X86-AVX-NEXT: vmovups 8(%ebp), %xmm0
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; X86-AVX-NEXT: vmovups %xmm0, (%esp)
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; X86-AVX-NEXT: calll lrintl
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; X86-AVX-NEXT: movl %ebp, %esp
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; X86-AVX-NEXT: popl %ebp
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; X86-AVX-NEXT: retl
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;
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; X64-LABEL: testmswq:
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; X64: # %bb.0: # %entry
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; X64-NEXT: jmp lrintl@PLT # TAILCALL
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entry:
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%0 = tail call i32 @llvm.lrint.i32.f128(fp128 %x)
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ret i32 %0
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}
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declare i32 @llvm.lrint.i32.f32(float) nounwind readnone
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declare i32 @llvm.lrint.i32.f64(double) nounwind readnone
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declare i32 @llvm.lrint.i32.f80(x86_fp80) nounwind readnone
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