d8a04398f9
So that when mixing small and large text, large text stays out of the way of the rest of the binary. This is useful for mixing precompiled small code model object files and built-from-source large code model binaries so that the the text sections don't get merged. The reland fixes an issue where a function in the large code model would reference small data without GOTOFF. This was incorrectly reverted in 76f78ecc789d58baa3a88b2fe2a57428f07e5362.
109 lines
3.7 KiB
LLVM
109 lines
3.7 KiB
LLVM
; This test should verify that adding !pcsections metadata is encoded properly
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; by the AsmPrinter. For tests to check that metadata is propagated to
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; assembly, see pcsections-*.ll tests.
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; RUN: llc -O0 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
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; RUN: llc -O1 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
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; RUN: llc -O2 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
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; RUN: llc -O3 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
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; RUN: llc -O1 -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,LARGE
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target triple = "x86_64-unknown-linux-gnu"
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@foo = dso_local global i64 0, align 8
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@bar = dso_local global i64 0, align 8
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define void @empty_no_aux() !pcsections !0 {
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; CHECK-LABEL: empty_no_aux:
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; CHECK-NEXT: .Lfunc_begin0
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: retq
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; CHECK-NEXT: .Lfunc_end0:
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; CHECK: .section section_no_aux,"awo",@progbits,.{{l?}}text
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; CHECK-NEXT: .Lpcsection_base0:
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; DEFCM-NEXT: .long .Lfunc_begin0-.Lpcsection_base0
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; LARGE-NEXT: .quad .Lfunc_begin0-.Lpcsection_base0
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; CHECK-NEXT: .long .Lfunc_end0-.Lfunc_begin0
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; CHECK-NEXT: .{{l?}}text
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entry:
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ret void
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}
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define void @empty_aux() !pcsections !1 {
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; CHECK-LABEL: empty_aux:
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; CHECK-NEXT: .Lfunc_begin1
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: retq
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; CHECK-NEXT: .Lfunc_end1:
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; CHECK: .section section_aux,"awo",@progbits,.{{l?}}text
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; CHECK-NEXT: .Lpcsection_base1:
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; DEFCM-NEXT: .long .Lfunc_begin1-.Lpcsection_base1
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; LARGE-NEXT: .quad .Lfunc_begin1-.Lpcsection_base1
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; CHECK-NEXT: .long .Lfunc_end1-.Lfunc_begin1
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; CHECK-NEXT: .long 10
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; CHECK-NEXT: .long 20
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; CHECK-NEXT: .long 30
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; CHECK-NEXT: .{{l?}}text
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entry:
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ret void
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}
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define i64 @multiple() !pcsections !0 {
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; CHECK-LABEL: multiple:
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; CHECK-NEXT: .Lfunc_begin2
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; CHECK: # %bb.0: # %entry
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; CHECK: .Lpcsection0:
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; CHECK-NEXT: movq
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; CHECK-NEXT: retq
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; CHECK-NEXT: .Lfunc_end2:
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; CHECK: .section section_no_aux,"awo",@progbits,.{{l?}}text
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; CHECK-NEXT: .Lpcsection_base2:
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; DEFCM-NEXT: .long .Lfunc_begin2-.Lpcsection_base2
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; LARGE-NEXT: .quad .Lfunc_begin2-.Lpcsection_base2
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; CHECK-NEXT: .long .Lfunc_end2-.Lfunc_begin2
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; CHECK-NEXT: .section section_aux_42,"awo",@progbits,.{{l?}}text
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; CHECK-NEXT: .Lpcsection_base3:
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; DEFCM-NEXT: .long .Lpcsection0-.Lpcsection_base3
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; LARGE-NEXT: .quad .Lpcsection0-.Lpcsection_base3
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; CHECK-NEXT: .long 42
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; CHECK-NEXT: .section section_aux_21264,"awo",@progbits,.{{l?}}text
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; CHECK-NEXT: .Lpcsection_base4:
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; DEFCM-NEXT: .long .Lpcsection0-.Lpcsection_base4
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; LARGE-NEXT: .quad .Lpcsection0-.Lpcsection_base4
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; CHECK-NEXT: .long 21264
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; CHECK-NEXT: .{{l?}}text
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entry:
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%0 = load i64, ptr @bar, align 8, !pcsections !2
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ret i64 %0
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}
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define void @multiple_uleb128() !pcsections !6 {
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; CHECK-LABEL: multiple_uleb128:
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; CHECK: .section section_aux,"awo",@progbits,.{{l?}}text
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; CHECK-NEXT: .Lpcsection_base5:
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; DEFCM-NEXT: .long .Lfunc_begin3-.Lpcsection_base5
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; LARGE-NEXT: .quad .Lfunc_begin3-.Lpcsection_base5
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; CHECK-NEXT: .uleb128 .Lfunc_end3-.Lfunc_begin3
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; CHECK-NEXT: .byte 42
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; CHECK-NEXT: .ascii "\345\216&"
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; CHECK-NEXT: .byte 255
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; CHECK-NEXT: .section section_aux_21264,"awo",@progbits,.{{l?}}text
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; CHECK-NEXT: .Lpcsection_base6:
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; DEFCM-NEXT: .long .Lfunc_begin3-.Lpcsection_base6
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; LARGE-NEXT: .quad .Lfunc_begin3-.Lpcsection_base6
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; CHECK-NEXT: .long .Lfunc_end3-.Lfunc_begin3
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; CHECK-NEXT: .long 21264
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; CHECK-NEXT: .{{l?}}text
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entry:
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ret void
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}
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!0 = !{!"section_no_aux"}
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!1 = !{!"section_aux", !3}
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!2 = !{!"section_aux_42", !4, !"section_aux_21264", !5}
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!3 = !{i32 10, i32 20, i32 30}
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!4 = !{i32 42}
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!5 = !{i32 21264}
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!6 = !{!"section_aux!C", !7, !"section_aux_21264", !5}
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!7 = !{i64 42, i32 624485, i8 255}
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