5080a0251f
DAG combiner already does this transformation, but in some cases it does not have a chance because either CodeGenPrepare or SelectionDAGBuilder move icmp to a different basic block. https://alive2.llvm.org/ce/z/ARzh99 Fixes #94829 Pull Request: https://github.com/llvm/llvm-project/pull/102731
33 lines
920 B
LLVM
33 lines
920 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc --mtriple=x86_64 -o - %s | FileCheck %s
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define i64 @test(i64 %x, i64 %y, i64 %a, i64 %b) {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: testq %rsi, %rsi
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; CHECK-NEXT: jg .LBB0_2
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: movq %rcx, %rax
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; CHECK-NEXT: leaq -1(%rdi), %rcx
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; CHECK-NEXT: andq %rdi, %rcx
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; CHECK-NEXT: jne .LBB0_2
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; CHECK-NEXT: # %bb.3: # %if.end
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB0_2: # %if.then
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; CHECK-NEXT: movq %rdx, %rax
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; CHECK-NEXT: retq
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entry:
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%ctpop = call i64 @llvm.ctpop.i64(i64 %x)
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%cmp1 = icmp ugt i64 %ctpop, 1
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%cmp2 = icmp sgt i64 %y, 0
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%cmp = or i1 %cmp2, %cmp1
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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br label %if.end
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if.end:
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%res = phi i64 [ %a, %if.then ], [ %b, %entry ]
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ret i64 %res
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}
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