3e6e54eb79
When folding (ashr (shl, x, c1), c2) we need to treat c1 and c2 as unsigned to find out if the combined shift should be a left or right shift. Also do an early out during pre-legalization in case c1 and c2 has differet types, as that otherwise complicated the comparison of c1 and c2 a bit.
88 lines
2.2 KiB
LLVM
88 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
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define i32 @shl16sar15(i32 %a) #0 {
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; CHECK-LABEL: shl16sar15:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movswl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: addl %eax, %eax
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; CHECK-NEXT: retl
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%1 = shl i32 %a, 16
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%2 = ashr exact i32 %1, 15
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ret i32 %2
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}
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define i32 @shl16sar17(i32 %a) #0 {
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; CHECK-LABEL: shl16sar17:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movswl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: sarl %eax
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; CHECK-NEXT: retl
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%1 = shl i32 %a, 16
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%2 = ashr exact i32 %1, 17
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ret i32 %2
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}
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define i32 @shl24sar23(i32 %a) #0 {
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; CHECK-LABEL: shl24sar23:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movsbl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: addl %eax, %eax
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; CHECK-NEXT: retl
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%1 = shl i32 %a, 24
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%2 = ashr exact i32 %1, 23
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ret i32 %2
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}
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define i32 @shl24sar25(i32 %a) #0 {
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; CHECK-LABEL: shl24sar25:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movsbl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: sarl %eax
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; CHECK-NEXT: retl
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%1 = shl i32 %a, 24
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%2 = ashr exact i32 %1, 25
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ret i32 %2
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}
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define void @shl144sar48(ptr %p) #0 {
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; CHECK-LABEL: shl144sar48:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movswl (%eax), %ecx
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; CHECK-NEXT: movl %ecx, %edx
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; CHECK-NEXT: sarl $31, %edx
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; CHECK-NEXT: shldl $2, %ecx, %edx
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; CHECK-NEXT: shll $2, %ecx
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; CHECK-NEXT: movl %ecx, 12(%eax)
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; CHECK-NEXT: movl %edx, 16(%eax)
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; CHECK-NEXT: movl $0, 8(%eax)
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; CHECK-NEXT: movl $0, 4(%eax)
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; CHECK-NEXT: movl $0, (%eax)
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; CHECK-NEXT: retl
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%a = load i160, ptr %p
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%1 = shl i160 %a, 144
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%2 = ashr exact i160 %1, 46
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store i160 %2, ptr %p
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ret void
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}
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define void @shl144sar2(ptr %p) #0 {
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; CHECK-LABEL: shl144sar2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movswl (%eax), %ecx
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; CHECK-NEXT: shll $14, %ecx
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; CHECK-NEXT: movl %ecx, 16(%eax)
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; CHECK-NEXT: movl $0, 8(%eax)
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; CHECK-NEXT: movl $0, 12(%eax)
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; CHECK-NEXT: movl $0, 4(%eax)
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; CHECK-NEXT: movl $0, (%eax)
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; CHECK-NEXT: retl
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%a = load i160, ptr %p
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%1 = shl i160 %a, 144
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%2 = ashr exact i160 %1, 2
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store i160 %2, ptr %p
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ret void
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}
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