049d6a3f42
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html Reviewed By: pengfei, skan Differential Revision: https://reviews.llvm.org/D155148
44 lines
2.0 KiB
LLVM
44 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+sm4 | FileCheck %s
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; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+sm4 | FileCheck %s
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define <4 x i32> @test_int_x86_vsm4key4128(<4 x i32> %A, <4 x i32> %B) {
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; CHECK-LABEL: test_int_x86_vsm4key4128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsm4key4 %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x7a,0xda,0xc1]
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; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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%ret = call <4 x i32> @llvm.x86.vsm4key4128(<4 x i32> %A, <4 x i32> %B)
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ret <4 x i32> %ret
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}
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declare <4 x i32> @llvm.x86.vsm4key4128(<4 x i32> %A, <4 x i32> %B)
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define <8 x i32> @test_int_x86_vsm4key4256(<8 x i32> %A, <8 x i32> %B) {
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; CHECK-LABEL: test_int_x86_vsm4key4256:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsm4key4 %ymm1, %ymm0, %ymm0 # encoding: [0xc4,0xe2,0x7e,0xda,0xc1]
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; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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%ret = call <8 x i32> @llvm.x86.vsm4key4256(<8 x i32> %A, <8 x i32> %B)
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ret <8 x i32> %ret
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}
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declare <8 x i32> @llvm.x86.vsm4key4256(<8 x i32> %A, <8 x i32> %B)
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define <4 x i32> @test_int_x86_vsm4rnds4128(<4 x i32> %A, <4 x i32> %B) {
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; CHECK-LABEL: test_int_x86_vsm4rnds4128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsm4rnds4 %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x7b,0xda,0xc1]
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; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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%ret = call <4 x i32> @llvm.x86.vsm4rnds4128(<4 x i32> %A, <4 x i32> %B)
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ret <4 x i32> %ret
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}
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declare <4 x i32> @llvm.x86.vsm4rnds4128(<4 x i32> %A, <4 x i32> %B)
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define <8 x i32> @test_int_x86_vsm4rnds4256(<8 x i32> %A, <8 x i32> %B) {
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; CHECK-LABEL: test_int_x86_vsm4rnds4256:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsm4rnds4 %ymm1, %ymm0, %ymm0 # encoding: [0xc4,0xe2,0x7f,0xda,0xc1]
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; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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%ret = call <8 x i32> @llvm.x86.vsm4rnds4256(<8 x i32> %A, <8 x i32> %B)
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ret <8 x i32> %ret
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}
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declare <8 x i32> @llvm.x86.vsm4rnds4256(<8 x i32> %A, <8 x i32> %B)
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