40a469f79a
The first commit is identical to
69bec0afbb8f2aa0021d18ea38768360b16583a9.
The second commit fixes the instruction verification failures by
replacing the erroneous instruction with a trap after the error is
reported and adds `-verify-machineinstrs` to the tests added in the
original PR to catch the issue sooner.
After that change, all tests pass with both
`LLVM_ENABLE_EXPENSIVE_CHECKS={On,Off}`.
cc @RKSimon @e-kud @phoebewang @arsenm as reviewers on the original PR
85 lines
3.6 KiB
LLVM
85 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
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; RUN: llc -mtriple=x86_64-linux-android -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X64 %s
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; RUN: llc -mtriple=i686-linux-android -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X86 %s
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; RUN: llc -mtriple=x86_64-linux-gnux32 -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X32 %s
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define i32 @foo() local_unnamed_addr #0 {
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; CHECK-X64-LABEL: foo:
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; CHECK-X64: # %bb.0:
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; CHECK-X64-NEXT: movabsq $-2399997952, %r11 # imm = 0xFFFFFFFF70F2F000
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; CHECK-X64-NEXT: addq %rsp, %r11
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; CHECK-X64-NEXT: .cfi_def_cfa_register %r11
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; CHECK-X64-NEXT: .cfi_adjust_cfa_offset 2399997952
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; CHECK-X64-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
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; CHECK-X64-NEXT: subq $4096, %rsp # imm = 0x1000
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; CHECK-X64-NEXT: movq $0, (%rsp)
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; CHECK-X64-NEXT: cmpq %r11, %rsp
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; CHECK-X64-NEXT: jne .LBB0_1
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; CHECK-X64-NEXT: # %bb.2:
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; CHECK-X64-NEXT: subq $1944, %rsp # imm = 0x798
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; CHECK-X64-NEXT: .cfi_def_cfa_register %rsp
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; CHECK-X64-NEXT: .cfi_def_cfa_offset 2399999904
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; CHECK-X64-NEXT: movl $1, 280(%rsp)
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; CHECK-X64-NEXT: movl $1, 28680(%rsp)
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; CHECK-X64-NEXT: movl -112(%rsp), %eax
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; CHECK-X64-NEXT: movl $2399999896, %ecx # imm = 0x8F0D1798
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; CHECK-X64-NEXT: addq %rcx, %rsp
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; CHECK-X64-NEXT: .cfi_def_cfa_offset 8
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; CHECK-X64-NEXT: retq
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;
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; CHECK-X86-LABEL: foo:
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; CHECK-X86: # %bb.0:
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; CHECK-X86-NEXT: movl %esp, %eax
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; CHECK-X86-NEXT: subl $2399997952, %eax # imm = 0x8F0D1000
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; CHECK-X86-NEXT: .cfi_def_cfa_register %eax
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; CHECK-X86-NEXT: .cfi_adjust_cfa_offset 2399997952
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; CHECK-X86-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
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; CHECK-X86-NEXT: subl $4096, %esp # imm = 0x1000
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; CHECK-X86-NEXT: movl $0, (%esp)
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; CHECK-X86-NEXT: cmpl %eax, %esp
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; CHECK-X86-NEXT: jne .LBB0_1
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; CHECK-X86-NEXT: # %bb.2:
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; CHECK-X86-NEXT: subl $2076, %esp # imm = 0x81C
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; CHECK-X86-NEXT: .cfi_def_cfa_register %esp
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; CHECK-X86-NEXT: .cfi_def_cfa_offset 2400000032
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; CHECK-X86-NEXT: movl $1, 408(%esp)
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; CHECK-X86-NEXT: movl $1, 28808(%esp)
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; CHECK-X86-NEXT: movl 16(%esp), %eax
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; CHECK-X86-NEXT: movl $2400000028, %ecx # imm = 0x8F0D181C
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; CHECK-X86-NEXT: addl %ecx, %esp
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; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
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; CHECK-X86-NEXT: retl
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;
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; CHECK-X32-LABEL: foo:
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; CHECK-X32: # %bb.0:
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; CHECK-X32-NEXT: movl %esp, %r11d
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; CHECK-X32-NEXT: subl $2399997952, %r11d # imm = 0x8F0D1000
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; CHECK-X32-NEXT: .cfi_def_cfa_register %r11
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; CHECK-X32-NEXT: .cfi_adjust_cfa_offset 2399997952
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; CHECK-X32-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
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; CHECK-X32-NEXT: subl $4096, %esp # imm = 0x1000
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; CHECK-X32-NEXT: movq $0, (%esp)
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; CHECK-X32-NEXT: cmpl %r11d, %esp
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; CHECK-X32-NEXT: jne .LBB0_1
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; CHECK-X32-NEXT: # %bb.2:
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; CHECK-X32-NEXT: subl $1944, %esp # imm = 0x798
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; CHECK-X32-NEXT: .cfi_def_cfa_register %rsp
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; CHECK-X32-NEXT: .cfi_def_cfa_offset 2399999904
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; CHECK-X32-NEXT: movl $1, 280(%esp)
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; CHECK-X32-NEXT: movl $1, 28680(%esp)
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; CHECK-X32-NEXT: movl -112(%esp), %eax
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; CHECK-X32-NEXT: movl $2399999896, %ecx # imm = 0x8F0D1798
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; CHECK-X32-NEXT: addl %ecx, %esp
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; CHECK-X32-NEXT: .cfi_def_cfa_offset 8
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; CHECK-X32-NEXT: retq
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%a = alloca i32, i64 600000000, align 16
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%b0 = getelementptr inbounds i32, ptr %a, i64 98
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%b1 = getelementptr inbounds i32, ptr %a, i64 7198
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store volatile i32 1, ptr %b0
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store volatile i32 1, ptr %b1
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%c = load volatile i32, ptr %a
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ret i32 %c
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}
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attributes #0 = {"probe-stack"="inline-asm"}
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