4154ada1d4
Implement Xtensa FP Option instructions and lowering of the base FP operations with tests. Implement UR registers parsing. Fix loading from constant pool callee, basic block, globaladdress and jumptable addresses. Also fixed potential memory leakage when several similar XtensaConstantPoolValue objects are created Fix lowering i32 immediate.
33 lines
1.2 KiB
LLVM
33 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=xtensa -O0 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=XTENSA
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define i8 @loadi8_128(i8 %a) {
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; XTENSA-LABEL: loadi8_128:
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; XTENSA: .cfi_startproc
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; XTENSA-NEXT: # %bb.0:
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; XTENSA-NEXT: addi a8, a1, -128
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: .cfi_def_cfa_offset 128
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; XTENSA-NEXT: s32i a0, a1, 124 # 4-byte Folded Spill
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; XTENSA-NEXT: .cfi_offset a0, -4
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; XTENSA-NEXT: l32r a8, .LCPI0_0
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; XTENSA-NEXT: addi a2, a1, 0
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; XTENSA-NEXT: movi a3, 0
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; XTENSA-NEXT: movi a4, 64
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; XTENSA-NEXT: callx0 a8
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; XTENSA-NEXT: l8ui a2, a1, 0
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; XTENSA-NEXT: l32i a0, a1, 124 # 4-byte Folded Reload
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; XTENSA-NEXT: movi a8, 128
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; XTENSA-NEXT: add a8, a1, a8
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: ret
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%aligned = alloca i8, align 128
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call void @llvm.memset.p0.i64(ptr noundef nonnull align 64 dereferenceable(64) %aligned, i8 0, i64 64, i1 false)
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%1 = load i8, ptr %aligned, align 128
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ret i8 %1
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}
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; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
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declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg)
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