140e1894f2
Patch 1/4 adding bitcode support. Store whether or not a function is using Key Instructions in its DISubprogram so that we don't need to rely on the -mllvm flag -dwarf-use-key-instructions to determine whether or not to interpret Key Instructions metadata to decide is_stmt placement at DWARF emission time. This makes bitcode support simple and enables well defined mixing of non-key-instructions and key-instructions functions in an LTO context. This patch adds the bit (using DISubprogram::SubclassData1). PR 144104 and 144103 use it during DWARF emission. PR 44102 adds bitcode support. See pull request for overview of alternative attempts.
89 lines
3.0 KiB
LLVM
89 lines
3.0 KiB
LLVM
; RUN: opt %s --passes=jump-threading -S -o - -S | FileCheck %s
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;; +-> T1 -+
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;; | v +-> T2
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;; Entry -+ Merge -+
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;; | ^ +-> F2
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;; +-> F1 -+
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;;
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;; Duplicate Merge into T1 then fold Merge into its only pred F1 (taking its name).
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;;
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;; +-> T1 -----> T2
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;; | \ ^
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;; | \ /
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;; | \ /
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;; Entry -+ +----+
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;; | / v
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;; +--> Merge -> F2
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;;
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;; Check the duplicated (into T1) instructions' atoms are remapped.
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; CHECK: T1:
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; CHECK-NEXT: %v1 = call i32 @f1()
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; CHECK-NEXT: %cond3 = icmp eq i32 %v1, 412
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; CHECK-NEXT: %C1 = add i32 %v1, 1, !dbg [[G3R2:!.*]]
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; CHECK-NEXT: store i32 %C1, ptr %p, align 4, !dbg [[G3R1:!.*]]
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; CHECK: Merge:
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; CHECK-NEXT: %v2 = call i32 @f2()
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; CHECK-NEXT: store i32 1, ptr %p, align 4, !dbg [[G1R1:!.*]]
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; CHECK-NEXT: %C = add i32 %v2, 1, !dbg [[G2R2:!.*]]
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; CHECK-NEXT: store i32 %C, ptr %p, align 4, !dbg [[G2R1:!.*]]
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; CHECK: distinct !DISubprogram(name: "test5", {{.*}}keyInstructions: true)
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; CHECK: [[G3R2]] = !DILocation({{.*}}, atomGroup: 3, atomRank: 2)
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; CHECK: [[G3R1]] = !DILocation({{.*}}, atomGroup: 3, atomRank: 1)
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; CHECK: [[G1R1]] = !DILocation({{.*}}, atomGroup: 1, atomRank: 1)
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; CHECK: [[G2R2]] = !DILocation({{.*}}, atomGroup: 2, atomRank: 2)
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; CHECK: [[G2R1]] = !DILocation({{.*}}, atomGroup: 2, atomRank: 1)
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define i32 @test5(i1 %cond, i1 %cond2, ptr %p) !dbg !5 {
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br i1 %cond, label %T1, label %F1
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T1: ; preds = %0
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%v1 = call i32 @f1()
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%cond3 = icmp eq i32 %v1, 412
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br label %Merge
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F1: ; preds = %0
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%v2 = call i32 @f2()
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store i32 1, ptr %p, align 4, !dbg !8
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br label %Merge
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Merge: ; preds = %F1, %T1
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%A = phi i1 [ %cond3, %T1 ], [ %cond2, %F1 ]
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%B = phi i32 [ %v1, %T1 ], [ %v2, %F1 ]
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%C = add i32 %B, 1, !dbg !9
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store i32 %C, ptr %p, align 4, !dbg !10
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br i1 %A, label %T2, label %F2
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T2: ; preds = %Merge
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call void @f3()
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ret i32 %B
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F2: ; preds = %Merge
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ret i32 %B
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}
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declare i32 @f1()
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declare i32 @f2()
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declare void @f3()
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!llvm.dbg.cu = !{!0}
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!llvm.debugify = !{!2, !3}
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!llvm.module.flags = !{!4}
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!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
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!1 = !DIFile(filename: "test.ll", directory: "/")
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!2 = !{i32 12}
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!3 = !{i32 0}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!5 = distinct !DISubprogram(name: "test5", linkageName: "test5", scope: null, file: !1, line: 1, type: !6, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, keyInstructions: true)
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!6 = !DISubroutineType(types: !7)
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!7 = !{}
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!8 = !DILocation(line: 1, column: 1, scope: !5, atomGroup: 1, atomRank: 1)
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!9 = !DILocation(line: 2, column: 1, scope: !5, atomGroup: 2, atomRank: 2)
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!10 = !DILocation(line: 2, column: 1, scope: !5, atomGroup: 2, atomRank: 1)
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