f5b81aa6ec
This patch adds support for conditional counter updates in single byte counters mode to reduce the write contention by first checking whether the counter is set before overwriting it. --------- Co-authored-by: Juan Manuel Martinez Caamaño <jmartinezcaamao@gmail.com>
70 lines
2.5 KiB
LLVM
70 lines
2.5 KiB
LLVM
; RUN: opt < %s -S -passes=instrprof -conditional-counter-update | FileCheck %s
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target triple = "x86_64-unknown-linux-gnu"
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@__profn_foo = private constant [3 x i8] c"foo"
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@__profn_bar = private constant [3 x i8] c"bar"
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; CHECK-LABEL: define void @foo
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; CHECK-NEXT: %pgocount = load i8, ptr @__profc_foo, align 1
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; CHECK-NEXT: %pgocount.ifnonzero = icmp ne i8 %pgocount, 0
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; CHECK-NEXT: br i1 %pgocount.ifnonzero, label %1, label %2
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; CHECK-LABEL: 1:
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; CHECK-NEXT: store i8 0, ptr @__profc_foo, align 1
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; CHECK-NEXT: br label %2
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; CHECK-LABEL: 2:
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; CHECK-NEXT: ret void
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define void @foo() {
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call void @llvm.instrprof.cover(ptr @__profn_foo, i64 0, i32 1, i32 0)
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ret void
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}
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; CHECK-LABEL: define i32 @bar
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; CHECK-LABEL: entry:
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; CHECK-NEXT: %retval = alloca i32, align 4
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; CHECK-NEXT: %cond.addr = alloca i32, align 4
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; CHECK-NEXT: store i32 %cond, ptr %cond.addr, align 4
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; CHECK-NEXT: %pgocount = load i8, ptr @__profc_bar, align 1
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; CHECK-NEXT: %pgocount.ifnonzero = icmp ne i8 %pgocount, 0
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; CHECK-NEXT: br i1 %pgocount.ifnonzero, label %0, label %1
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; CHECK-LABEL: 0: ; preds = %entry
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; CHECK-NEXT: store i8 0, ptr @__profc_bar, align 1
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; CHECK-NEXT: br label %1
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; CHECK-LABEL: 1: ; preds = %entry, %0
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; CHECK-NEXT: %2 = load i32, ptr %cond.addr, align 4
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; CHECK-NEXT: %cmp = icmp slt i32 %2, 0
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; CHECK-NEXT: br i1 %cmp, label %if.then, label %if.end
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; CHECK-LABEL: if.then: ; preds = %1
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; CHECK-NEXT: %pgocount1 = load i8, ptr getelementptr inbounds ([3 x i8], ptr @__profc_bar, i32 0, i32 1), align 1
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; CHECK-NEXT: %pgocount.ifnonzero2 = icmp ne i8 %pgocount1, 0
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; CHECK-NEXT: br i1 %pgocount.ifnonzero2, label %3, label %4
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define i32 @bar(i32 %cond) #0 {
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entry:
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%retval = alloca i32, align 4
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%cond.addr = alloca i32, align 4
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store i32 %cond, ptr %cond.addr, align 4
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call void @llvm.instrprof.cover(ptr @__profn_bar, i64 0, i32 3, i32 0)
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%0 = load i32, ptr %cond.addr, align 4
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%cmp = icmp slt i32 %0, 0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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call void @llvm.instrprof.cover(ptr @__profn_bar, i64 0, i32 3, i32 1)
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store i32 -1, ptr %retval, align 4
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br label %return
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if.end: ; preds = %entry
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call void @llvm.instrprof.cover(ptr @__profn_bar, i64 0, i32 3, i32 2)
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store i32 0, ptr %retval, align 4
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br label %return
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return: ; preds = %if.end, %if.then
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%1 = load i32, ptr %retval, align 4
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ret i32 %1
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}
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