0676acb6fd
Should cover most of the tests for GVN, GVNHoist, GVNSink, GlobalOpt, GlobalSplit, InstCombine, Reassociate, SROA and TailCallElim that had not been updated earlier.
112 lines
3.3 KiB
LLVM
112 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=gvn -S < %s | FileCheck %s
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declare void @use(i32, i32)
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define void @binop(i32 %x, i32 %y) {
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; CHECK-LABEL: @binop(
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; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: call void @use(i32 [[ADD1]], i32 [[ADD1]])
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; CHECK-NEXT: ret void
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;
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%add1 = add i32 %x, %y
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%add2 = add i32 %y, %x
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call void @use(i32 %add1, i32 %add2)
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ret void
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}
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declare void @vse(i1, i1)
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define void @cmp(i32 %x, i32 %y) {
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; CHECK-LABEL: @cmp(
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: call void @vse(i1 [[CMP1]], i1 [[CMP1]])
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; CHECK-NEXT: ret void
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;
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%cmp1 = icmp ult i32 %x, %y
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%cmp2 = icmp ugt i32 %y, %x
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call void @vse(i1 %cmp1, i1 %cmp2)
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ret void
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}
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declare i32 @llvm.umax.i32(i32, i32)
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define void @intrinsic(i32 %x, i32 %y) {
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; CHECK-LABEL: @intrinsic(
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; CHECK-NEXT: [[M1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
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; CHECK-NEXT: call void @use(i32 [[M1]], i32 [[M1]])
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; CHECK-NEXT: ret void
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;
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%m1 = call i32 @llvm.umax.i32(i32 %x, i32 %y)
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%m2 = call i32 @llvm.umax.i32(i32 %y, i32 %x)
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call void @use(i32 %m1, i32 %m2)
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ret void
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}
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declare { i32, i1 } @llvm.umul.with.overflow.i32(i32, i32)
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define { i32, i1 } @intrinsic2(i32 %x, i32 %y, i1 %cond) {
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; CHECK-LABEL: @intrinsic2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: unreachable
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; CHECK: if.end:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 0, [[Y:%.*]]
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; CHECK-NEXT: [[UMUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[X:%.*]], i32 [[Y]])
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; CHECK-NEXT: ret { i32, i1 } [[UMUL]]
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;
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entry:
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br i1 %cond, label %if.then, label %if.end
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if.then:
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unreachable
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if.end:
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%cmp = icmp eq i32 0, %y
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%umul = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %x, i32 %y)
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ret { i32, i1 } %umul
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}
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declare i16 @llvm.smul.fix.i16(i16, i16, i32)
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declare i16 @llvm.umul.fix.i16(i16, i16, i32)
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define i16 @intrinsic_3_args(i16 %x, i16 %y) {
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; CHECK-LABEL: @intrinsic_3_args(
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; CHECK-NEXT: [[M1:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[X:%.*]], i16 [[Y:%.*]], i32 1)
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; CHECK-NEXT: ret i16 0
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;
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%m1 = call i16 @llvm.smul.fix.i16(i16 %x, i16 %y, i32 1)
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%m2 = call i16 @llvm.smul.fix.i16(i16 %y, i16 %x, i32 1)
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%r = sub i16 %m1, %m2
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ret i16 %r
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}
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; Negative test - 3rd arg is different
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define i16 @intrinsic_3_args_not_same(i16 %x, i16 %y) {
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; CHECK-LABEL: @intrinsic_3_args_not_same(
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; CHECK-NEXT: [[M1:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[X:%.*]], i16 [[Y:%.*]], i32 2)
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; CHECK-NEXT: [[M2:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[Y]], i16 [[X]], i32 1)
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; CHECK-NEXT: [[R:%.*]] = sub i16 [[M1]], [[M2]]
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; CHECK-NEXT: ret i16 [[R]]
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;
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%m1 = call i16 @llvm.umul.fix.i16(i16 %x, i16 %y, i32 2)
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%m2 = call i16 @llvm.umul.fix.i16(i16 %y, i16 %x, i32 1)
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%r = sub i16 %m1, %m2
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ret i16 %r
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}
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declare float @llvm.fma.f32(float, float, float)
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define float @fma(float %x, float %y) {
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; CHECK-LABEL: @fma(
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; CHECK-NEXT: [[M1:%.*]] = call float @llvm.fma.f32(float [[X:%.*]], float [[Y:%.*]], float 1.000000e+00)
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; CHECK-NEXT: ret float 1.000000e+00
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;
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%m1 = call float @llvm.fma.f32(float %x, float %y, float 1.0)
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%m2 = call float @llvm.fma.f32(float %y, float %x, float 1.0)
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%r = fdiv nnan float %m1, %m2
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ret float %r
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}
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