c23b4fbdbb
Now that #149310 has restricted lifetime intrinsics to only work on allocas, we can also drop the explicit size argument. Instead, the size is implied by the alloca. This removes the ability to only mark a prefix of an alloca alive/dead. We never used that capability, so we should remove the need to handle that possibility everywhere (though many key places, including stack coloring, did not actually respect this).
80 lines
3.3 KiB
LLVM
80 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost -no-ir-sim-intrinsics < %s | FileCheck %s
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; This test ensures that we do not outline vararg instructions or intrinsics, as
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; they may cause inconsistencies when outlining.
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declare void @llvm.va_start(ptr)
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declare void @llvm.va_copy(ptr, ptr)
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declare void @llvm.va_end(ptr)
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define i32 @func1(i32 %a, double %b, ptr %v, ...) nounwind {
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; CHECK-LABEL: @func1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B_ADDR:%.*]] = alloca double, align 8
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; CHECK-NEXT: [[AP:%.*]] = alloca ptr, align 4
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; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4
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; CHECK-NEXT: call void @outlined_ir_func_0(i32 [[A:%.*]], ptr [[A_ADDR]], double [[B:%.*]], ptr [[B_ADDR]])
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; CHECK-NEXT: call void @llvm.va_start.p0(ptr [[AP]])
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; CHECK-NEXT: [[TMP0:%.*]] = va_arg ptr [[AP]], i32
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; CHECK-NEXT: call void @llvm.va_copy.p0(ptr [[V:%.*]], ptr [[AP]])
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; CHECK-NEXT: call void @llvm.va_end.p0(ptr [[AP]])
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP_LOC]])
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; CHECK-NEXT: call void @outlined_ir_func_1(i32 [[TMP0]], ptr [[C]], ptr [[TMP_LOC]])
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; CHECK-NEXT: [[TMP_RELOAD:%.*]] = load i32, ptr [[TMP_LOC]], align 4
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP_LOC]])
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; CHECK-NEXT: ret i32 [[TMP_RELOAD]]
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;
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entry:
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%a.addr = alloca i32, align 4
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%b.addr = alloca double, align 8
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%ap = alloca ptr, align 4
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%c = alloca i32, align 4
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store i32 %a, ptr %a.addr, align 4
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store double %b, ptr %b.addr, align 8
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call void @llvm.va_start(ptr %ap)
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%0 = va_arg ptr %ap, i32
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call void @llvm.va_copy(ptr %v, ptr %ap)
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call void @llvm.va_end(ptr %ap)
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store i32 %0, ptr %c, align 4
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%tmp = load i32, ptr %c, align 4
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ret i32 %tmp
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}
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define i32 @func2(i32 %a, double %b, ptr %v, ...) nounwind {
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; CHECK-LABEL: @func2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B_ADDR:%.*]] = alloca double, align 8
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; CHECK-NEXT: [[AP:%.*]] = alloca ptr, align 4
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; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4
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; CHECK-NEXT: call void @outlined_ir_func_0(i32 [[A:%.*]], ptr [[A_ADDR]], double [[B:%.*]], ptr [[B_ADDR]])
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; CHECK-NEXT: call void @llvm.va_start.p0(ptr [[AP]])
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; CHECK-NEXT: [[TMP0:%.*]] = va_arg ptr [[AP]], i32
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; CHECK-NEXT: call void @llvm.va_copy.p0(ptr [[V:%.*]], ptr [[AP]])
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; CHECK-NEXT: call void @llvm.va_end.p0(ptr [[AP]])
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP_LOC]])
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; CHECK-NEXT: call void @outlined_ir_func_1(i32 [[TMP0]], ptr [[C]], ptr [[TMP_LOC]])
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; CHECK-NEXT: [[TMP_RELOAD:%.*]] = load i32, ptr [[TMP_LOC]], align 4
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP_LOC]])
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; CHECK-NEXT: ret i32 [[TMP_RELOAD]]
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;
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entry:
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%a.addr = alloca i32, align 4
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%b.addr = alloca double, align 8
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%ap = alloca ptr, align 4
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%c = alloca i32, align 4
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store i32 %a, ptr %a.addr, align 4
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store double %b, ptr %b.addr, align 8
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call void @llvm.va_start(ptr %ap)
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%0 = va_arg ptr %ap, i32
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call void @llvm.va_copy(ptr %v, ptr %ap)
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call void @llvm.va_end(ptr %ap)
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store i32 %0, ptr %c, align 4
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%tmp = load i32, ptr %c, align 4
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ret i32 %tmp
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}
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