b7baf2ee8d
This is a (very belated) reland of 0a362f12ec60a49a054befec8620a8e69523af54, which I originally reverted due to flang test failures. This marks mul constant expressions as undesirable, which means that we will no longer create them by default, but they can still be created explicitly. Part of: https://discourse.llvm.org/t/rfc-remove-most-constant-expressions/63179
513 lines
14 KiB
LLVM
513 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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define i64 @test1(i64 %A, i32 %B) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[A:%.*]], 123
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; CHECK-NEXT: ret i64 [[TMP6]]
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;
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%tmp12 = zext i32 %B to i64
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%tmp3 = shl i64 %tmp12, 32
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%tmp5 = add i64 %tmp3, %A
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%tmp6 = and i64 %tmp5, 123
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ret i64 %tmp6
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}
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define i32 @test2(i32 %A) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[F:%.*]] = and i32 [[A:%.*]], 39
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; CHECK-NEXT: ret i32 [[F]]
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;
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%B = and i32 %A, 7
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%C = and i32 %A, 32
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%F = add i32 %B, %C
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ret i32 %F
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}
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define i32 @test3(i32 %A) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[B:%.*]] = and i32 [[A:%.*]], 128
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; CHECK-NEXT: [[C:%.*]] = lshr i32 [[A]], 30
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; CHECK-NEXT: [[F:%.*]] = or disjoint i32 [[B]], [[C]]
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; CHECK-NEXT: ret i32 [[F]]
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;
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%B = and i32 %A, 128
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%C = lshr i32 %A, 30
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%F = add i32 %B, %C
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ret i32 %F
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}
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define i32 @test4(i32 %A) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[B:%.*]] = shl nuw i32 [[A:%.*]], 1
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; CHECK-NEXT: ret i32 [[B]]
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;
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%B = add nuw i32 %A, %A
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ret i32 %B
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}
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define <2 x i1> @test5(<2 x i1> %A, <2 x i1> %B) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: [[ADD:%.*]] = xor <2 x i1> [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: ret <2 x i1> [[ADD]]
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;
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%add = add <2 x i1> %A, %B
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ret <2 x i1> %add
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}
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define <2 x i64> @test6(<2 x i64> %A) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: [[ADD:%.*]] = mul <2 x i64> [[A:%.*]], <i64 5, i64 9>
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; CHECK-NEXT: ret <2 x i64> [[ADD]]
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;
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%shl = shl <2 x i64> %A, <i64 2, i64 3>
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%add = add <2 x i64> %shl, %A
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ret <2 x i64> %add
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}
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define <2 x i64> @test7(<2 x i64> %A) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[ADD:%.*]] = mul <2 x i64> [[A:%.*]], <i64 7, i64 12>
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; CHECK-NEXT: ret <2 x i64> [[ADD]]
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;
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%shl = shl <2 x i64> %A, <i64 2, i64 3>
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%mul = mul <2 x i64> %A, <i64 3, i64 4>
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%add = add <2 x i64> %shl, %mul
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ret <2 x i64> %add
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}
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define i16 @test9(i16 %a) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: [[D:%.*]] = mul i16 [[A:%.*]], -32767
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; CHECK-NEXT: ret i16 [[D]]
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;
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%b = mul i16 %a, 2
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%c = mul i16 %a, 32767
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%d = add i16 %b, %c
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ret i16 %d
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}
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; y + (~((x >> 3) & 0x55555555) + 1) -> y - ((x >> 3) & 0x55555555)
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define i32 @test10(i32 %x, i32 %y) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[X:%.*]], 3
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHR]], 1431655765
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; CHECK-NEXT: [[ADD1:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[ADD1]]
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;
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%shr = ashr i32 %x, 3
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%shr.not = or i32 %shr, -1431655766
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%neg = xor i32 %shr.not, 1431655765
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%add = add i32 %y, 1
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%add1 = add i32 %add, %neg
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ret i32 %add1
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}
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; y + (~(x & 0x55555555) + 1) -> y - (x & 0x55555555)
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define i32 @test11(i32 %x, i32 %y) {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 1431655765
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; CHECK-NEXT: [[ADD1:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[ADD1]]
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;
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%x.not = or i32 %x, -1431655766
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%neg = xor i32 %x.not, 1431655765
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%add = add i32 %y, 1
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%add1 = add i32 %add, %neg
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ret i32 %add1
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}
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; (y + 1) + ~(x & 0x55555555) -> y - (x & 0x55555555)
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define i32 @test12(i32 %x, i32 %y) {
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 1431655765
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; CHECK-NEXT: [[ADD1:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[ADD1]]
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;
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%add = add nsw i32 %y, 1
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%x.not = or i32 %x, -1431655766
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%neg = xor i32 %x.not, 1431655765
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%add1 = add nsw i32 %add, %neg
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ret i32 %add1
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}
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; y + (~(x & 0x55555556) + 1) -> y - (x & 0x55555556)
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define i32 @test13(i32 %x, i32 %y) {
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; CHECK-LABEL: @test13(
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 1431655766
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; CHECK-NEXT: [[ADD1:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[ADD1]]
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;
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%x.not = or i32 %x, -1431655767
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%neg = xor i32 %x.not, 1431655766
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%add = add i32 %y, 1
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%add1 = add i32 %add, %neg
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ret i32 %add1
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}
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; (y + 1) + ~(x & 0x55555556) -> y - (x & 0x55555556)
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define i32 @test14(i32 %x, i32 %y) {
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; CHECK-LABEL: @test14(
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 1431655766
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; CHECK-NEXT: [[ADD1:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[ADD1]]
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;
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%add = add nsw i32 %y, 1
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%x.not = or i32 %x, -1431655767
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%neg = xor i32 %x.not, 1431655766
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%add1 = add nsw i32 %add, %neg
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ret i32 %add1
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}
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; y + (~(x | 0x55555556) + 1) -> y - (x | 0x55555556)
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define i32 @test15(i32 %x, i32 %y) {
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; CHECK-LABEL: @test15(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], 1431655766
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[SUB]]
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;
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%x.not = and i32 %x, -1431655767
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%neg = xor i32 %x.not, -1431655767
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%add = add i32 %y, 1
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%add1 = add i32 %add, %neg
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ret i32 %add1
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}
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; (y + 1) + ~(x | 0x55555556) -> y - (x | 0x555555556)
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define i32 @test16(i32 %x, i32 %y) {
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; CHECK-LABEL: @test16(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], 1431655766
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[SUB]]
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;
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%add = add nsw i32 %y, 1
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%x.not = and i32 %x, -1431655767
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%neg = xor i32 %x.not, -1431655767
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%add1 = add nsw i32 %add, %neg
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ret i32 %add1
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}
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; y + (~(x | 0x55555555) + 1) -> y - (x | 0x55555555)
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define i32 @test17(i32 %x, i32 %y) {
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; CHECK-LABEL: @test17(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], 1431655765
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[SUB]]
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;
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%x.not = and i32 %x, -1431655766
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%add2 = xor i32 %x.not, -1431655765
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%add1 = add nsw i32 %add2, %y
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ret i32 %add1
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}
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; (y + 1) + ~(x | 0x55555555) -> y - (x | 0x55555555)
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define i32 @test18(i32 %x, i32 %y) {
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; CHECK-LABEL: @test18(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], 1431655765
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[SUB]]
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;
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%add = add nsw i32 %y, 1
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%x.not = and i32 %x, -1431655766
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%neg = xor i32 %x.not, -1431655766
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%add1 = add nsw i32 %add, %neg
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ret i32 %add1
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}
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define i16 @add_nsw_mul_nsw(i16 %x) {
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; CHECK-LABEL: @add_nsw_mul_nsw(
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; CHECK-NEXT: [[ADD2:%.*]] = mul nsw i16 [[X:%.*]], 3
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; CHECK-NEXT: ret i16 [[ADD2]]
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;
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%add1 = add nsw i16 %x, %x
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%add2 = add nsw i16 %add1, %x
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ret i16 %add2
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}
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define i16 @mul_add_to_mul_1(i16 %x) {
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; CHECK-LABEL: @mul_add_to_mul_1(
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; CHECK-NEXT: [[ADD2:%.*]] = mul nsw i16 [[X:%.*]], 9
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; CHECK-NEXT: ret i16 [[ADD2]]
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;
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%mul1 = mul nsw i16 %x, 8
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%add2 = add nsw i16 %x, %mul1
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ret i16 %add2
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}
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define i16 @mul_add_to_mul_2(i16 %x) {
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; CHECK-LABEL: @mul_add_to_mul_2(
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; CHECK-NEXT: [[ADD2:%.*]] = mul nsw i16 [[X:%.*]], 9
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; CHECK-NEXT: ret i16 [[ADD2]]
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;
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%mul1 = mul nsw i16 %x, 8
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%add2 = add nsw i16 %mul1, %x
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ret i16 %add2
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}
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define i16 @mul_add_to_mul_3(i16 %a) {
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; CHECK-LABEL: @mul_add_to_mul_3(
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; CHECK-NEXT: [[ADD:%.*]] = mul i16 [[A:%.*]], 5
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; CHECK-NEXT: ret i16 [[ADD]]
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;
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%mul1 = mul i16 %a, 2
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%mul2 = mul i16 %a, 3
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%add = add nsw i16 %mul1, %mul2
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ret i16 %add
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}
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define i16 @mul_add_to_mul_4(i16 %a) {
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; CHECK-LABEL: @mul_add_to_mul_4(
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; CHECK-NEXT: [[ADD:%.*]] = mul nsw i16 [[A:%.*]], 9
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; CHECK-NEXT: ret i16 [[ADD]]
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;
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%mul1 = mul nsw i16 %a, 2
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%mul2 = mul nsw i16 %a, 7
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%add = add nsw i16 %mul1, %mul2
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ret i16 %add
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}
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define i16 @mul_add_to_mul_5(i16 %a) {
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; CHECK-LABEL: @mul_add_to_mul_5(
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; CHECK-NEXT: [[ADD:%.*]] = mul nsw i16 [[A:%.*]], 10
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; CHECK-NEXT: ret i16 [[ADD]]
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;
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%mul1 = mul nsw i16 %a, 3
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%mul2 = mul nsw i16 %a, 7
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%add = add nsw i16 %mul1, %mul2
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ret i16 %add
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}
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define i32 @mul_add_to_mul_6(i32 %x, i32 %y) {
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; CHECK-LABEL: @mul_add_to_mul_6(
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; CHECK-NEXT: [[MUL1:%.*]] = mul nsw i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[ADD:%.*]] = mul nsw i32 [[MUL1]], 6
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%mul1 = mul nsw i32 %x, %y
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%mul2 = mul nsw i32 %mul1, 5
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%add = add nsw i32 %mul1, %mul2
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ret i32 %add
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}
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define i16 @mul_add_to_mul_7(i16 %x) {
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; CHECK-LABEL: @mul_add_to_mul_7(
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; CHECK-NEXT: [[ADD2:%.*]] = shl i16 [[X:%.*]], 15
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; CHECK-NEXT: ret i16 [[ADD2]]
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;
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%mul1 = mul nsw i16 %x, 32767
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%add2 = add nsw i16 %x, %mul1
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ret i16 %add2
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}
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define i16 @mul_add_to_mul_8(i16 %a) {
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; CHECK-LABEL: @mul_add_to_mul_8(
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; CHECK-NEXT: [[ADD:%.*]] = mul nsw i16 [[A:%.*]], 32767
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; CHECK-NEXT: ret i16 [[ADD]]
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;
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%mul1 = mul nsw i16 %a, 16383
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%mul2 = mul nsw i16 %a, 16384
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%add = add nsw i16 %mul1, %mul2
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ret i16 %add
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}
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define i16 @mul_add_to_mul_9(i16 %a) {
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; CHECK-LABEL: @mul_add_to_mul_9(
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; CHECK-NEXT: [[ADD:%.*]] = shl i16 [[A:%.*]], 15
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; CHECK-NEXT: ret i16 [[ADD]]
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;
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%mul1 = mul nsw i16 %a, 16384
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%mul2 = mul nsw i16 %a, 16384
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%add = add nsw i16 %mul1, %mul2
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ret i16 %add
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}
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@g = external global i8
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define i32 @shl_add_to_shl_constexpr() {
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; CHECK-LABEL: @shl_add_to_shl_constexpr(
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; CHECK-NEXT: [[ADD:%.*]] = shl i32 ptrtoint (ptr @g to i32), 2
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%shl = shl i32 ptrtoint (ptr @g to i32), 1
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%add = add i32 %shl, %shl
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ret i32 %add
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}
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; This test and the next test verify that when a range metadata is attached to
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; llvm.cttz, ValueTracking correctly intersects the range specified by the
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; metadata and the range implied by the intrinsic.
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;
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; In this test, the range specified by the metadata is more strict. Therefore,
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; ValueTracking uses that range.
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define i16 @add_cttz(i16 %a) {
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; CHECK-LABEL: @add_cttz(
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; CHECK-NEXT: [[CTTZ:%.*]] = call i16 @llvm.cttz.i16(i16 [[A:%.*]], i1 true), !range [[RNG0:![0-9]+]]
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; CHECK-NEXT: [[B:%.*]] = or disjoint i16 [[CTTZ]], -8
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; CHECK-NEXT: ret i16 [[B]]
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;
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; llvm.cttz.i16(..., /*is_zero_undefined=*/true) implies the value returned
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; is in [0, 16). The range metadata indicates the value returned is in [0, 8).
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; Intersecting these ranges, we know the value returned is in [0, 8).
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; Therefore, InstCombine will transform
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; add %cttz, 1111 1111 1111 1000 ; decimal -8
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; to
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; or %cttz, 1111 1111 1111 1000
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%cttz = call i16 @llvm.cttz.i16(i16 %a, i1 true), !range !0
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%b = add i16 %cttz, -8
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ret i16 %b
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}
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declare i16 @llvm.cttz.i16(i16, i1)
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!0 = !{i16 0, i16 8}
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; Similar to @add_cttz, but in this test, the range implied by the
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; intrinsic is more strict. Therefore, ValueTracking uses that range.
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define i16 @add_cttz_2(i16 %a) {
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; CHECK-LABEL: @add_cttz_2(
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; CHECK-NEXT: [[CTTZ:%.*]] = call i16 @llvm.cttz.i16(i16 [[A:%.*]], i1 true), !range [[RNG1:![0-9]+]]
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; CHECK-NEXT: [[B:%.*]] = or disjoint i16 [[CTTZ]], -16
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; CHECK-NEXT: ret i16 [[B]]
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;
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; llvm.cttz.i16(..., /*is_zero_undefined=*/true) implies the value returned
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; is in [0, 16). The range metadata indicates the value returned is in
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; [0, 32). Intersecting these ranges, we know the value returned is in
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; [0, 16). Therefore, InstCombine will transform
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; add %cttz, 1111 1111 1111 0000 ; decimal -16
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; to
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; or %cttz, 1111 1111 1111 0000
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%cttz = call i16 @llvm.cttz.i16(i16 %a, i1 true), !range !1
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%b = add i16 %cttz, -16
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ret i16 %b
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}
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!1 = !{i16 0, i16 32}
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define i32 @add_or_and(i32 %x, i32 %y) {
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; CHECK-LABEL: @add_or_and(
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%or = or i32 %x, %y
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%and = and i32 %x, %y
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%add = add i32 %or, %and
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ret i32 %add
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}
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define i32 @add_or_and_commutative(i32 %x, i32 %y) {
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; CHECK-LABEL: @add_or_and_commutative(
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%or = or i32 %x, %y
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%and = and i32 %y, %x ; swapped
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%add = add i32 %or, %and
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ret i32 %add
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}
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define i32 @add_and_or(i32 %x, i32 %y) {
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; CHECK-LABEL: @add_and_or(
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: ret i32 [[ADD]]
|
|
;
|
|
%or = or i32 %x, %y
|
|
%and = and i32 %x, %y
|
|
%add = add i32 %and, %or
|
|
ret i32 %add
|
|
}
|
|
|
|
define i32 @add_and_or_commutative(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @add_and_or_commutative(
|
|
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
|
|
; CHECK-NEXT: ret i32 [[ADD]]
|
|
;
|
|
%or = or i32 %x, %y
|
|
%and = and i32 %y, %x ; swapped
|
|
%add = add i32 %and, %or
|
|
ret i32 %add
|
|
}
|
|
|
|
define i32 @add_nsw_or_and(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @add_nsw_or_and(
|
|
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[X:%.*]], [[Y:%.*]]
|
|
; CHECK-NEXT: ret i32 [[ADD]]
|
|
;
|
|
%or = or i32 %x, %y
|
|
%and = and i32 %x, %y
|
|
%add = add nsw i32 %or, %and
|
|
ret i32 %add
|
|
}
|
|
|
|
define i32 @add_nuw_or_and(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @add_nuw_or_and(
|
|
; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[X:%.*]], [[Y:%.*]]
|
|
; CHECK-NEXT: ret i32 [[ADD]]
|
|
;
|
|
%or = or i32 %x, %y
|
|
%and = and i32 %x, %y
|
|
%add = add nuw i32 %or, %and
|
|
ret i32 %add
|
|
}
|
|
|
|
define i32 @add_nuw_nsw_or_and(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @add_nuw_nsw_or_and(
|
|
; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[X:%.*]], [[Y:%.*]]
|
|
; CHECK-NEXT: ret i32 [[ADD]]
|
|
;
|
|
%or = or i32 %x, %y
|
|
%and = and i32 %x, %y
|
|
%add = add nsw nuw i32 %or, %and
|
|
ret i32 %add
|
|
}
|
|
|
|
; A *nsw B + A *nsw C != A *nsw (B + C)
|
|
; e.g. A = -1, B = 1, C = INT_SMAX
|
|
|
|
define i8 @add_of_mul(i8 %x, i8 %y, i8 %z) {
|
|
; CHECK-LABEL: @add_of_mul(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: [[MB1:%.*]] = add i8 [[Y:%.*]], [[Z:%.*]]
|
|
; CHECK-NEXT: [[SUM:%.*]] = mul i8 [[X:%.*]], [[MB1]]
|
|
; CHECK-NEXT: ret i8 [[SUM]]
|
|
;
|
|
entry:
|
|
%mA = mul nsw i8 %x, %y
|
|
%mB = mul nsw i8 %x, %z
|
|
%sum = add nsw i8 %mA, %mB
|
|
ret i8 %sum
|
|
}
|
|
|
|
define i32 @add_of_selects(i1 %A, i32 %B) {
|
|
; CHECK-LABEL: @add_of_selects(
|
|
; CHECK-NEXT: [[ADD:%.*]] = select i1 [[A:%.*]], i32 [[B:%.*]], i32 0
|
|
; CHECK-NEXT: ret i32 [[ADD]]
|
|
;
|
|
%sel0 = select i1 %A, i32 0, i32 -2
|
|
%sel1 = select i1 %A, i32 %B, i32 2
|
|
%add = add i32 %sel0, %sel1
|
|
ret i32 %add
|
|
}
|
|
|
|
; The ADD can't cause overflow out of the low 4 bits so the OR can be removed.
|
|
|
|
define i32 @add_undemanded_low_bits(i32 %x) {
|
|
; CHECK-LABEL: @add_undemanded_low_bits(
|
|
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[X:%.*]], 1616
|
|
; CHECK-NEXT: [[SHR:%.*]] = lshr i32 [[ADD]], 4
|
|
; CHECK-NEXT: ret i32 [[SHR]]
|
|
;
|
|
%or = or i32 %x, 15
|
|
%add = add i32 %or, 1616
|
|
%shr = lshr i32 %add, 4
|
|
ret i32 %shr
|
|
}
|
|
|
|
define i32 @sub_undemanded_low_bits(i32 %x) {
|
|
; CHECK-LABEL: @sub_undemanded_low_bits(
|
|
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[X:%.*]], -1616
|
|
; CHECK-NEXT: [[SHR:%.*]] = lshr i32 [[SUB]], 4
|
|
; CHECK-NEXT: ret i32 [[SHR]]
|
|
;
|
|
%or = or i32 %x, 15
|
|
%sub = sub i32 %or, 1616
|
|
%shr = lshr i32 %sub, 4
|
|
ret i32 %shr
|
|
}
|