f38365aef4
Unfortunately alive2 cannot prove the correctness due to fails by timeout even for float type half. However it should be correct. If a and b are not NaN, maximum and minimum will just return different values (a and b) and take into account a + b == b + a this is the same. If a or b is NaN, than maximum and minimum are equal to NaN and NaN + NaN is NaN. a + b is also a NaN. In terms of preserving fast flags, we cannot preserve ninf due to minimum(NaN, Infinity) == maximum(NaN, Infinity) == NaN, minimum(NaN, Infinity) +ninf maximum(NaN, Infinity) == NaN +ninf NaN = NaN However transformation will change minimum(NaN, Infinity) + maximum(NaN, Infinity) to NaN +ninf Infinity == poison. But if fadd is marked as nnan, we can preserve because NaN +ninf/nnan NaN = poison as well. The same optimization for maximum(a,b) * minimum(a,b) => a * b is added. All said above for fadd is correct for fmul. Reviewed By: mkazantsev Differential Revision: https://reviews.llvm.org/D147299
100 lines
3.1 KiB
LLVM
100 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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declare float @llvm.minimum.f32(float %Val0, float %Val1)
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declare float @llvm.maximum.f32(float %Val0, float %Val1)
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declare <4 x float> @llvm.minimum.v4f32(<4 x float> %Val0, <4 x float> %Val1)
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declare <4 x float> @llvm.maximum.v4f32(<4 x float> %Val0, <4 x float> %Val1)
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define float @test(float %a, float %b) {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = fmul float [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: ret float [[RES]]
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;
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entry:
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%min = call float @llvm.minimum.f32(float %a, float %b)
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%max = call float @llvm.maximum.f32(float %a, float %b)
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%res = fmul float %min, %max
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ret float %res
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}
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define float @test_comm1(float %a, float %b) {
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; CHECK-LABEL: @test_comm1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = fmul float [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: ret float [[RES]]
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;
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entry:
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%min = call float @llvm.minimum.f32(float %a, float %b)
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%max = call float @llvm.maximum.f32(float %a, float %b)
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%res = fmul float %max, %min
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ret float %res
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}
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define float @test_comm2(float %a, float %b) {
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; CHECK-LABEL: @test_comm2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = fmul float [[B:%.*]], [[A:%.*]]
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; CHECK-NEXT: ret float [[RES]]
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;
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entry:
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%min = call float @llvm.minimum.f32(float %a, float %b)
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%max = call float @llvm.maximum.f32(float %b, float %a)
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%res = fmul float %min, %max
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ret float %res
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}
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define float @test_comm3(float %a, float %b) {
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; CHECK-LABEL: @test_comm3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = fmul float [[B:%.*]], [[A:%.*]]
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; CHECK-NEXT: ret float [[RES]]
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;
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entry:
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%min = call float @llvm.minimum.f32(float %a, float %b)
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%max = call float @llvm.maximum.f32(float %b, float %a)
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%res = fmul float %max, %min
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ret float %res
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}
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define <4 x float> @test_vect(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: @test_vect(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = fmul <4 x float> [[B:%.*]], [[A:%.*]]
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; CHECK-NEXT: ret <4 x float> [[RES]]
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;
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entry:
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%min = call <4 x float> @llvm.minimum.v4f32(<4 x float> %a, <4 x float> %b)
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%max = call <4 x float> @llvm.maximum.v4f32(<4 x float> %b, <4 x float> %a)
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%res = fmul <4 x float> %min, %max
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ret <4 x float> %res
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}
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define float @test_flags(float %a, float %b) {
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; CHECK-LABEL: @test_flags(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = fmul fast float [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: ret float [[RES]]
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;
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entry:
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%min = call float @llvm.minimum.f32(float %a, float %b)
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%max = call float @llvm.maximum.f32(float %a, float %b)
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%res = fmul fast float %min, %max
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ret float %res
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}
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define float @test_flags2(float %a, float %b) {
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; CHECK-LABEL: @test_flags2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = fmul reassoc nsz arcp contract afn float [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: ret float [[RES]]
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;
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entry:
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%min = call float @llvm.minimum.f32(float %a, float %b)
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%max = call float @llvm.maximum.f32(float %a, float %b)
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%res = fmul reassoc ninf nsz arcp contract afn float %min, %max
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ret float %res
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}
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