5987f1ee5c
`narrow-switch.ll` test has been regenerated via latest UTC using `--prefix-filecheck-ir-name _`, so as to avoid conflicts with scripted variable names.
364 lines
11 KiB
LLVM
364 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --prefix-filecheck-ir-name _ --version 5
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; Vary legal integer types in data layout.
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; RUN: opt < %s -passes=instcombine -S -data-layout=n32 | FileCheck %s --check-prefix=ALL --check-prefix=CHECK32
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; RUN: opt < %s -passes=instcombine -S -data-layout=n32:64 | FileCheck %s --check-prefix=ALL --check-prefix=CHECK64
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define i32 @positive1(i64 %a) {
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; ALL-LABEL: define i32 @positive1(
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; ALL-SAME: i64 [[A:%.*]]) {
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; ALL-NEXT: [[ENTRY:.*]]:
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; ALL-NEXT: [[TRUNC:%.*]] = trunc i64 [[A]] to i32
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; ALL-NEXT: switch i32 [[TRUNC]], label %[[SW_DEFAULT:.*]] [
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; ALL-NEXT: i32 10, label %[[RETURN:.*]]
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; ALL-NEXT: i32 100, label %[[SW_BB1:.*]]
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; ALL-NEXT: i32 1001, label %[[SW_BB2:.*]]
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; ALL-NEXT: ]
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; ALL: [[SW_BB1]]:
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[SW_BB2]]:
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[SW_DEFAULT]]:
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[RETURN]]:
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; ALL-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 24, %[[SW_DEFAULT]] ], [ 123, %[[SW_BB2]] ], [ 213, %[[SW_BB1]] ], [ 231, %[[ENTRY]] ]
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; ALL-NEXT: ret i32 [[RETVAL_0]]
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;
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entry:
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%and = and i64 %a, 4294967295
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switch i64 %and, label %sw.default [
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i64 10, label %return
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i64 100, label %sw.bb1
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i64 1001, label %sw.bb2
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]
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sw.bb1:
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br label %return
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sw.bb2:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32 [ 24, %sw.default ], [ 123, %sw.bb2 ], [ 213, %sw.bb1 ], [ 231, %entry ]
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ret i32 %retval.0
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}
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define i32 @negative1(i64 %a) {
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; ALL-LABEL: define i32 @negative1(
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; ALL-SAME: i64 [[A:%.*]]) {
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; ALL-NEXT: [[ENTRY:.*]]:
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; ALL-NEXT: [[TRUNC:%.*]] = trunc i64 [[A]] to i32
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; ALL-NEXT: switch i32 [[TRUNC]], label %[[SW_DEFAULT:.*]] [
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; ALL-NEXT: i32 -10, label %[[RETURN:.*]]
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; ALL-NEXT: i32 -100, label %[[SW_BB1:.*]]
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; ALL-NEXT: i32 -1001, label %[[SW_BB2:.*]]
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; ALL-NEXT: ]
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; ALL: [[SW_BB1]]:
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[SW_BB2]]:
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[SW_DEFAULT]]:
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[RETURN]]:
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; ALL-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 24, %[[SW_DEFAULT]] ], [ 123, %[[SW_BB2]] ], [ 213, %[[SW_BB1]] ], [ 231, %[[ENTRY]] ]
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; ALL-NEXT: ret i32 [[RETVAL_0]]
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;
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entry:
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%or = or i64 %a, -4294967296
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switch i64 %or, label %sw.default [
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i64 -10, label %return
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i64 -100, label %sw.bb1
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i64 -1001, label %sw.bb2
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]
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sw.bb1:
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br label %return
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sw.bb2:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32 [ 24, %sw.default ], [ 123, %sw.bb2 ], [ 213, %sw.bb1 ], [ 231, %entry ]
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ret i32 %retval.0
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}
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; Make sure truncating a constant int larger than 64-bit doesn't trigger an
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; assertion.
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define i32 @trunc72to68(i72 %a) {
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; ALL-LABEL: define i32 @trunc72to68(
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; ALL-SAME: i72 [[A:%.*]]) {
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; ALL-NEXT: [[ENTRY:.*]]:
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; ALL-NEXT: [[TRUNC:%.*]] = trunc i72 [[A]] to i68
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; ALL-NEXT: switch i68 [[TRUNC]], label %[[SW_DEFAULT:.*]] [
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; ALL-NEXT: i68 10, label %[[RETURN:.*]]
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; ALL-NEXT: i68 100, label %[[SW_BB1:.*]]
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; ALL-NEXT: i68 1001, label %[[SW_BB2:.*]]
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; ALL-NEXT: ]
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; ALL: [[SW_BB1]]:
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[SW_BB2]]:
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[SW_DEFAULT]]:
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[RETURN]]:
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; ALL-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 24, %[[SW_DEFAULT]] ], [ 123, %[[SW_BB2]] ], [ 213, %[[SW_BB1]] ], [ 231, %[[ENTRY]] ]
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; ALL-NEXT: ret i32 [[RETVAL_0]]
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;
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entry:
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%and = and i72 %a, 295147905179352825855
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switch i72 %and, label %sw.default [
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i72 10, label %return
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i72 100, label %sw.bb1
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i72 1001, label %sw.bb2
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]
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sw.bb1:
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br label %return
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sw.bb2:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32 [ 24, %sw.default ], [ 123, %sw.bb2 ], [ 213, %sw.bb1 ], [ 231, %entry ]
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ret i32 %retval.0
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}
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; Make sure to avoid assertion crashes and use the type before
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; truncation to generate the sub constant expressions that leads
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; to the recomputed condition.
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; We allow truncate from i64 to i58 if in 32-bit mode,
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; because both are illegal.
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define void @trunc64to58(i64 %a) {
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; CHECK32-LABEL: define void @trunc64to58(
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; CHECK32-SAME: i64 [[A:%.*]]) {
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; CHECK32-NEXT: [[ENTRY:.*:]]
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; CHECK32-NEXT: [[TMP0:%.*]] = trunc i64 [[A]] to i58
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; CHECK32-NEXT: [[TMP1:%.*]] = and i58 [[TMP0]], 15
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; CHECK32-NEXT: [[TRUNC:%.*]] = mul nuw i58 [[TMP1]], 18717182647723699
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; CHECK32-NEXT: switch i58 [[TRUNC]], label %[[SW_DEFAULT:.*]] [
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; CHECK32-NEXT: i58 0, label %[[SW_BB1:.*]]
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; CHECK32-NEXT: i58 18717182647723699, label %[[SW_BB2:.*]]
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; CHECK32-NEXT: ]
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; CHECK32: [[SW_BB1]]:
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; CHECK32-NEXT: br label %[[SW_DEFAULT]]
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; CHECK32: [[SW_BB2]]:
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; CHECK32-NEXT: br label %[[SW_DEFAULT]]
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; CHECK32: [[SW_DEFAULT]]:
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; CHECK32-NEXT: ret void
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;
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; CHECK64-LABEL: define void @trunc64to58(
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; CHECK64-SAME: i64 [[A:%.*]]) {
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; CHECK64-NEXT: [[ENTRY:.*:]]
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; CHECK64-NEXT: [[_TMP0:%.*]] = and i64 [[A]], 15
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; CHECK64-NEXT: [[TMP0:%.*]] = mul nuw nsw i64 [[_TMP0]], 18717182647723699
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; CHECK64-NEXT: switch i64 [[TMP0]], label %[[SW_DEFAULT:.*]] [
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; CHECK64-NEXT: i64 0, label %[[SW_BB1:.*]]
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; CHECK64-NEXT: i64 18717182647723699, label %[[SW_BB2:.*]]
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; CHECK64-NEXT: ]
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; CHECK64: [[SW_BB1]]:
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; CHECK64-NEXT: br label %[[SW_DEFAULT]]
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; CHECK64: [[SW_BB2]]:
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; CHECK64-NEXT: br label %[[SW_DEFAULT]]
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; CHECK64: [[SW_DEFAULT]]:
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; CHECK64-NEXT: ret void
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;
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entry:
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%tmp0 = and i64 %a, 15
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%tmp1 = mul i64 %tmp0, -6425668444178048401
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%tmp2 = add i64 %tmp1, 5170979678563097242
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%tmp3 = mul i64 %tmp2, 1627972535142754813
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switch i64 %tmp3, label %sw.default [
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i64 847514119312061490, label %sw.bb1
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i64 866231301959785189, label %sw.bb2
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]
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sw.bb1:
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br label %sw.default
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sw.bb2:
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br label %sw.default
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sw.default:
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ret void
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}
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; https://llvm.org/bugs/show_bug.cgi?id=31260
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define i8 @PR31260(i8 %x) {
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; ALL-LABEL: define i8 @PR31260(
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; ALL-SAME: i8 [[X:%.*]]) {
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; ALL-NEXT: [[ENTRY:.*:]]
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; ALL-NEXT: [[T4:%.*]] = and i8 [[X]], 2
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; ALL-NEXT: switch i8 [[T4]], label %[[EXIT:.*]] [
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; ALL-NEXT: i8 0, label %[[CASE126:.*]]
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; ALL-NEXT: i8 2, label %[[CASE124:.*]]
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; ALL-NEXT: ]
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; ALL: [[EXIT]]:
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; ALL-NEXT: ret i8 1
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; ALL: [[CASE126]]:
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; ALL-NEXT: ret i8 3
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; ALL: [[CASE124]]:
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; ALL-NEXT: ret i8 5
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;
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entry:
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%t4 = and i8 %x, 2
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%t5 = add nsw i8 %t4, -126
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switch i8 %t5, label %exit [
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i8 -126, label %case126
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i8 -124, label %case124
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]
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exit:
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ret i8 1
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case126:
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ret i8 3
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case124:
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ret i8 5
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}
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; Make sure the arithmetic evaluation of the switch
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; condition is evaluated on the original type
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define i32 @trunc32to16(i32 %a0) #0 {
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; ALL-LABEL: define i32 @trunc32to16(
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; ALL-SAME: i32 [[A0:%.*]]) {
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; ALL-NEXT: [[ENTRY:.*:]]
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; ALL-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
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; ALL-NEXT: [[XOR:%.*]] = lshr i32 [[A0]], 16
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; ALL-NEXT: [[TMP0:%.*]] = trunc nuw i32 [[XOR]] to i16
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; ALL-NEXT: [[TRUNC:%.*]] = xor i16 [[TMP0]], 15784
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; ALL-NEXT: switch i16 [[TRUNC]], label %[[SW_EPILOG:.*]] [
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; ALL-NEXT: i16 63, label %[[SW_BB:.*]]
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; ALL-NEXT: i16 1, label %[[SW_BB1:.*]]
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; ALL-NEXT: i16 100, label %[[SW_BB2:.*]]
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; ALL-NEXT: ]
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; ALL: [[SW_BB]]:
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; ALL-NEXT: store i32 90, ptr [[RETVAL]], align 4
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; ALL-NEXT: br label %[[RETURN:.*]]
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; ALL: [[SW_BB1]]:
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; ALL-NEXT: store i32 91, ptr [[RETVAL]], align 4
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[SW_BB2]]:
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; ALL-NEXT: store i32 92, ptr [[RETVAL]], align 4
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[SW_EPILOG]]:
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; ALL-NEXT: store i32 113, ptr [[RETVAL]], align 4
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; ALL-NEXT: br label %[[RETURN]]
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; ALL: [[RETURN]]:
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; ALL-NEXT: [[RVAL:%.*]] = load i32, ptr [[RETVAL]], align 4
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; ALL-NEXT: ret i32 [[RVAL]]
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;
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entry:
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%retval = alloca i32, align 4
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%xor = xor i32 %a0, 1034460917
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%shr = lshr i32 %xor, 16
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%add = add i32 %shr, -917677090
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switch i32 %add, label %sw.epilog [
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i32 -917677027, label %sw.bb
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i32 -917677089, label %sw.bb1
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i32 -917676990, label %sw.bb2
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]
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sw.bb: ; preds = %entry
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store i32 90, ptr %retval, align 4
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br label %return
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sw.bb1: ; preds = %entry
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store i32 91, ptr %retval, align 4
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br label %return
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sw.bb2: ; preds = %entry
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store i32 92, ptr %retval, align 4
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br label %return
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sw.epilog: ; preds = %entry
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store i32 113, ptr %retval, align 4
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br label %return
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return: ; preds = %sw.epilog, %sw.bb2,
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%rval = load i32, ptr %retval, align 4
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ret i32 %rval
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}
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; https://llvm.org/bugs/show_bug.cgi?id=29009
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@a = global i32 0, align 4
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@njob = global i32 0, align 4
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declare i32 @goo()
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; Make sure we do not shrink to illegal types (i3 in this case)
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; if original type is legal (i32 in this case)
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define void @PR29009() {
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; ALL-LABEL: define void @PR29009() {
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; ALL-NEXT: br label %[[BB1:.*]]
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; ALL: [[BB1]]:
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; ALL-NEXT: [[TMP2:%.*]] = load volatile i32, ptr @njob, align 4
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; ALL-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP2]], 0
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; ALL-NEXT: br i1 [[DOTNOT]], label %[[BB10:.*]], label %[[BB3:.*]]
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; ALL: [[BB3]]:
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; ALL-NEXT: [[TMP4:%.*]] = call i32 @goo()
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; ALL-NEXT: [[TMP5:%.*]] = and i32 [[TMP4]], 7
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; ALL-NEXT: switch i32 [[TMP5]], label %[[BB6:.*]] [
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; ALL-NEXT: i32 0, label %[[BB7:.*]]
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; ALL-NEXT: i32 3, label %[[BB8:.*]]
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; ALL-NEXT: ]
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; ALL: [[BB6]]:
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; ALL-NEXT: store i32 6, ptr @a, align 4
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; ALL-NEXT: br label %[[BB9:.*]]
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; ALL: [[BB7]]:
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; ALL-NEXT: store i32 1, ptr @a, align 4
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; ALL-NEXT: br label %[[BB9]]
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; ALL: [[BB8]]:
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; ALL-NEXT: store i32 2, ptr @a, align 4
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; ALL-NEXT: br label %[[BB9]]
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; ALL: [[BB9]]:
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; ALL-NEXT: br label %[[BB1]]
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; ALL: [[BB10]]:
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; ALL-NEXT: ret void
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;
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br label %1
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; <label>:1: ; preds = %10, %0
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%2 = load volatile i32, ptr @njob, align 4
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%3 = icmp ne i32 %2, 0
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br i1 %3, label %4, label %11
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; <label>:4: ; preds = %1
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%5 = call i32 @goo()
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%6 = and i32 %5, 7
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switch i32 %6, label %7 [
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i32 0, label %8
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i32 3, label %9
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]
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; <label>:7: ; preds = %4
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store i32 6, ptr @a, align 4
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br label %10
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; <label>:8: ; preds = %4
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store i32 1, ptr @a, align 4
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br label %10
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; <label>:9: ; preds = %4
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store i32 2, ptr @a, align 4
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br label %10
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; <label>:10: ; preds = %13, %12, %11, %10, %9, %8, %7
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br label %1
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; <label>:11: ; preds = %1
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ret void
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}
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