
Previously only fixed vector splats were handled. This adds supports for scalable vectors too by allowing ConstantExpr splats. We need to add the extra V->getType()->isVectorTy() check because a ConstantExpr might be a scalar to vector bitcast. By allowing ConstantExprs this also allow fixed vector ConstantExprs to be folded, which causes the diffs in llvm/test/Analysis/ValueTracking/known-bits-from-operator-constexpr.ll and llvm/test/Transforms/InstSimplify/ConstProp/cast-vector.ll. I can remove them from this PR if reviewers would prefer. Fixes #132922
41 lines
1.9 KiB
LLVM
41 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=instcombine -S < %s | FileCheck %s
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define void @trunc_nxv2i64_to_nxv2i32(ptr %ptr, <vscale x 4 x i32> %v) {
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; CHECK-LABEL: @trunc_nxv2i64_to_nxv2i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 4 x i32> [[V:%.*]] to <vscale x 2 x i64>
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; CHECK-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[TMP0]])
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; CHECK-NEXT: [[TMP3:%.*]] = trunc <vscale x 2 x i64> [[TMP1]] to <vscale x 2 x i32>
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; CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2i32(<vscale x 2 x i32> [[TMP3]], <vscale x 2 x i1> [[TMP2]], ptr [[PTR:%.*]])
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; CHECK-NEXT: ret void
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;
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entry:
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%0 = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)
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%1 = bitcast <vscale x 4 x i32> %v to <vscale x 2 x i64>
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%2 = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %0)
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%3 = trunc <vscale x 2 x i64> %1 to <vscale x 2 x i32>
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call void @llvm.aarch64.sve.st1.nxv2i32(<vscale x 2 x i32> %3, <vscale x 2 x i1> %2, ptr %ptr)
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ret void
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}
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define <vscale x 1 x i8> @constant_splat_trunc() {
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; CHECK-LABEL: @constant_splat_trunc(
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; CHECK-NEXT: ret <vscale x 1 x i8> splat (i8 1)
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;
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%1 = trunc <vscale x 1 x i64> splat (i64 1) to <vscale x 1 x i8>
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ret <vscale x 1 x i8> %1
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}
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define <vscale x 1 x i8> @constant_splat_trunc_constantexpr() {
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; CHECK-LABEL: @constant_splat_trunc_constantexpr(
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; CHECK-NEXT: ret <vscale x 1 x i8> splat (i8 1)
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;
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ret <vscale x 1 x i8> trunc (<vscale x 1 x i64> splat (i64 1) to <vscale x 1 x i8>)
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}
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declare void @llvm.aarch64.sve.st1.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i1>, ptr)
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declare <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1>)
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declare <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 %pattern)
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