edf56f1fa2
A lot of interchange tests unnecessary relied on a build with ASSERTS enabled. Instead, simply check the IR output for both negative and positive tests so that we don't rely on debug messages. This increases test coverage as these tests will now also run with non-assert builds. For a couple of files keeping some of the debug tests was useful, so separated out them out and moved them to a similarly named *-remarks.ll file.
66 lines
3.0 KiB
LLVM
66 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -verify-dom-info -verify-loop-info -S 2>&1 | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@A = common global [100 x [100 x i32]] zeroinitializer
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@B = common global [100 x i32] zeroinitializer
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; Loops should not be interchanged in this case as it is not legal due to dependency.
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;
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; for(int j=0;j<99;j++)
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; for(int i=0;i<99;i++)
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; A[j][i+1] = A[j+1][i]+k;
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;
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define void @interchange_04(i32 %k){
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; CHECK-LABEL: define void @interchange_04(
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; CHECK-SAME: i32 [[K:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[FOR_COND1_PREHEADER:.*]]
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; CHECK: [[FOR_COND1_PREHEADER]]:
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; CHECK-NEXT: [[INDVARS_IV23:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT24:%.*]], %[[FOR_INC12:.*]] ]
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; CHECK-NEXT: [[INDVARS_IV_NEXT24]] = add nuw nsw i64 [[INDVARS_IV23]], 1
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; CHECK-NEXT: br label %[[FOR_BODY3:.*]]
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; CHECK: [[FOR_BODY3]]:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[FOR_COND1_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY3]] ]
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; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 [[INDVARS_IV_NEXT24]], i64 [[INDVARS_IV]]
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4
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; CHECK-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP0]], [[K]]
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 [[INDVARS_IV23]], i64 [[INDVARS_IV_NEXT]]
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; CHECK-NEXT: store i32 [[ADD6]], ptr [[ARRAYIDX11]], align 4
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 99
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; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_INC12]], label %[[FOR_BODY3]]
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; CHECK: [[FOR_INC12]]:
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; CHECK-NEXT: [[EXITCOND25:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT24]], 99
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; CHECK-NEXT: br i1 [[EXITCOND25]], label %[[FOR_END14:.*]], label %[[FOR_COND1_PREHEADER]]
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; CHECK: [[FOR_END14]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.cond1.preheader
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for.cond1.preheader:
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%indvars.iv23 = phi i64 [ 0, %entry ], [ %indvars.iv.next24, %for.inc12 ]
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%indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
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br label %for.body3
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for.body3:
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%indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.body3 ]
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%arrayidx5 = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 %indvars.iv.next24, i64 %indvars.iv
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%0 = load i32, ptr %arrayidx5
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%add6 = add nsw i32 %0, %k
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%arrayidx11 = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 %indvars.iv23, i64 %indvars.iv.next
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store i32 %add6, ptr %arrayidx11
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%exitcond = icmp eq i64 %indvars.iv.next, 99
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br i1 %exitcond, label %for.inc12, label %for.body3
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for.inc12:
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%exitcond25 = icmp eq i64 %indvars.iv.next24, 99
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br i1 %exitcond25, label %for.end14, label %for.cond1.preheader
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for.end14:
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ret void
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}
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