edf56f1fa2
A lot of interchange tests unnecessary relied on a build with ASSERTS enabled. Instead, simply check the IR output for both negative and positive tests so that we don't rely on debug messages. This increases test coverage as these tests will now also run with non-assert builds. For a couple of files keeping some of the debug tests was useful, so separated out them out and moved them to a similarly named *-remarks.ll file.
237 lines
9.7 KiB
LLVM
237 lines
9.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -passes=loop-interchange -verify-dom-info -verify-loop-info -S 2>&1 | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@A = common global [100 x [100 x i32]] zeroinitializer
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@B = common global [100 x i32] zeroinitializer
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@C = common global [100 x [100 x i32]] zeroinitializer
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@D = common global [100 x [100 x [100 x i32]]] zeroinitializer
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; Loops not tightly nested are not interchanged
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;
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; for(int j=0;j<N;j++) {
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; B[j] = j+k;
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; for(int i=0;i<N;i++)
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; A[j][i] = A[j][i]+B[j];
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; }
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;
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define void @interchange_05(i32 %k, i32 %N){
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; CHECK-LABEL: define void @interchange_05(
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; CHECK-SAME: i32 [[K:%.*]], i32 [[N:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[CMP30:%.*]] = icmp sgt i32 [[N]], 0
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; CHECK-NEXT: br i1 [[CMP30]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END17:.*]]
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; CHECK: [[FOR_BODY_LR_PH]]:
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
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; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[K]] to i64
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; CHECK-NEXT: br label %[[FOR_BODY:.*]]
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; CHECK: [[FOR_BODY]]:
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; CHECK-NEXT: [[INDVARS_IV32:%.*]] = phi i64 [ 0, %[[FOR_BODY_LR_PH]] ], [ [[INDVARS_IV_NEXT33:%.*]], %[[FOR_INC15:.*]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = add nsw i64 [[INDVARS_IV32]], [[TMP1]]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr @B, i64 0, i64 [[INDVARS_IV32]]
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; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i32
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; CHECK-NEXT: store i32 [[TMP3]], ptr [[ARRAYIDX]], align 4
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; CHECK-NEXT: br label %[[FOR_BODY3:.*]]
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; CHECK: [[FOR_BODY3]]:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[FOR_BODY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY3]] ]
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; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 [[INDVARS_IV32]], i64 [[INDVARS_IV]]
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; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4
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; CHECK-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP3]], [[TMP4]]
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; CHECK-NEXT: store i32 [[ADD10]], ptr [[ARRAYIDX7]], align 4
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV]] to i32
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[TMP0]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_INC15]], label %[[FOR_BODY3]]
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; CHECK: [[FOR_INC15]]:
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; CHECK-NEXT: [[INDVARS_IV_NEXT33]] = add nuw nsw i64 [[INDVARS_IV32]], 1
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; CHECK-NEXT: [[LFTR_WIDEIV35:%.*]] = trunc i64 [[INDVARS_IV32]] to i32
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; CHECK-NEXT: [[EXITCOND36:%.*]] = icmp eq i32 [[LFTR_WIDEIV35]], [[TMP0]]
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; CHECK-NEXT: br i1 [[EXITCOND36]], label %[[FOR_END17_LOOPEXIT:.*]], label %[[FOR_BODY]]
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; CHECK: [[FOR_END17_LOOPEXIT]]:
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; CHECK-NEXT: br label %[[FOR_END17]]
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; CHECK: [[FOR_END17]]:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp30 = icmp sgt i32 %N, 0
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br i1 %cmp30, label %for.body.lr.ph, label %for.end17
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for.body.lr.ph:
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%0 = add i32 %N, -1
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%1 = zext i32 %k to i64
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br label %for.body
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for.body:
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%indvars.iv32 = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next33, %for.inc15 ]
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%2 = add nsw i64 %indvars.iv32, %1
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%arrayidx = getelementptr inbounds [100 x i32], ptr @B, i64 0, i64 %indvars.iv32
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%3 = trunc i64 %2 to i32
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store i32 %3, ptr %arrayidx
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br label %for.body3
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for.body3:
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%indvars.iv = phi i64 [ 0, %for.body ], [ %indvars.iv.next, %for.body3 ]
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%arrayidx7 = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 %indvars.iv32, i64 %indvars.iv
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%4 = load i32, ptr %arrayidx7
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%add10 = add nsw i32 %3, %4
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store i32 %add10, ptr %arrayidx7
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %0
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br i1 %exitcond, label %for.inc15, label %for.body3
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for.inc15:
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%indvars.iv.next33 = add nuw nsw i64 %indvars.iv32, 1
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%lftr.wideiv35 = trunc i64 %indvars.iv32 to i32
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%exitcond36 = icmp eq i32 %lftr.wideiv35, %0
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br i1 %exitcond36, label %for.end17, label %for.body
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for.end17:
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ret void
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}
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declare void @foo(...) readnone
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; Loops not tightly nested are not interchanged
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; for(int j=0;j<N;j++) {
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; foo();
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; for(int i=2;i<N;i++)
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; A[j][i] = A[j][i]+k;
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; }
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;
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define void @interchange_06(i32 %k, i32 %N) {
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; CHECK-LABEL: define void @interchange_06(
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; CHECK-SAME: i32 [[K:%.*]], i32 [[N:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[CMP22:%.*]] = icmp sgt i32 [[N]], 0
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; CHECK-NEXT: br i1 [[CMP22]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END12:.*]]
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; CHECK: [[FOR_BODY_LR_PH]]:
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
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; CHECK-NEXT: br label %[[FOR_BODY:.*]]
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; CHECK: [[FOR_BODY]]:
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; CHECK-NEXT: [[INDVARS_IV24:%.*]] = phi i64 [ 0, %[[FOR_BODY_LR_PH]] ], [ [[INDVARS_IV_NEXT25:%.*]], %[[FOR_INC10:.*]] ]
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; CHECK-NEXT: tail call void (...) @foo()
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; CHECK-NEXT: br label %[[FOR_BODY3:.*]]
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; CHECK: [[FOR_BODY3]]:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY3]] ], [ 2, %[[FOR_BODY]] ]
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; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 [[INDVARS_IV24]], i64 [[INDVARS_IV]]
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; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[K]]
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; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX5]], align 4
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV]] to i32
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[TMP0]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_INC10]], label %[[FOR_BODY3]]
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; CHECK: [[FOR_INC10]]:
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; CHECK-NEXT: [[INDVARS_IV_NEXT25]] = add nuw nsw i64 [[INDVARS_IV24]], 1
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; CHECK-NEXT: [[LFTR_WIDEIV26:%.*]] = trunc i64 [[INDVARS_IV24]] to i32
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; CHECK-NEXT: [[EXITCOND27:%.*]] = icmp eq i32 [[LFTR_WIDEIV26]], [[TMP0]]
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; CHECK-NEXT: br i1 [[EXITCOND27]], label %[[FOR_END12_LOOPEXIT:.*]], label %[[FOR_BODY]]
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; CHECK: [[FOR_END12_LOOPEXIT]]:
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; CHECK-NEXT: br label %[[FOR_END12]]
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; CHECK: [[FOR_END12]]:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp22 = icmp sgt i32 %N, 0
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br i1 %cmp22, label %for.body.lr.ph, label %for.end12
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for.body.lr.ph:
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%0 = add i32 %N, -1
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br label %for.body
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for.body:
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%indvars.iv24 = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next25, %for.inc10 ]
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tail call void (...) @foo()
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br label %for.body3
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for.body3:
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body3 ], [ 2, %for.body ]
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%arrayidx5 = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 %indvars.iv24, i64 %indvars.iv
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%1 = load i32, ptr %arrayidx5
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%add = add nsw i32 %1, %k
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store i32 %add, ptr %arrayidx5
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %0
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br i1 %exitcond, label %for.inc10, label %for.body3
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for.inc10:
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%indvars.iv.next25 = add nuw nsw i64 %indvars.iv24, 1
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%lftr.wideiv26 = trunc i64 %indvars.iv24 to i32
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%exitcond27 = icmp eq i32 %lftr.wideiv26, %0
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br i1 %exitcond27, label %for.end12, label %for.body
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for.end12:
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ret void
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}
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; The following Loop is not considered tightly nested and is not interchanged.
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; The outer loop header does not branch to the inner loop preheader, or the
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; inner loop header, or the outer loop latch.
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;
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define void @interchange_07(i32 %k, i32 %N, i64 %ny) {
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; CHECK-LABEL: define void @interchange_07(
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; CHECK-SAME: i32 [[K:%.*]], i32 [[N:%.*]], i64 [[NY:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[FOR1_HEADER:.*]]
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; CHECK: [[FOR1_HEADER]]:
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; CHECK-NEXT: [[J23:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[J_NEXT24:%.*]], %[[FOR1_INC10:.*]] ]
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; CHECK-NEXT: [[CMP21:%.*]] = icmp slt i64 0, [[NY]]
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; CHECK-NEXT: br label %[[SINGLESUCC:.*]]
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; CHECK: [[SINGLESUCC]]:
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; CHECK-NEXT: br i1 [[CMP21]], label %[[PREHEADER_J:.*]], label %[[FOR1_INC10]]
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; CHECK: [[PREHEADER_J]]:
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; CHECK-NEXT: br label %[[FOR2:.*]]
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; CHECK: [[FOR2]]:
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; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[J_NEXT:%.*]], %[[FOR2]] ], [ 0, %[[PREHEADER_J]] ]
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; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 [[J]], i64 [[J23]]
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; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[LV]], [[K]]
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; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX5]], align 4
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; CHECK-NEXT: [[J_NEXT]] = add nuw nsw i64 [[J]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[J]], 99
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; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR1_INC10_LOOPEXIT:.*]], label %[[FOR2]]
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; CHECK: [[FOR1_INC10_LOOPEXIT]]:
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; CHECK-NEXT: br label %[[FOR1_INC10]]
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; CHECK: [[FOR1_INC10]]:
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; CHECK-NEXT: [[J_NEXT24]] = add nuw nsw i64 [[J23]], 1
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; CHECK-NEXT: [[EXITCOND26:%.*]] = icmp eq i64 [[J23]], 99
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; CHECK-NEXT: br i1 [[EXITCOND26]], label %[[FOR_END12:.*]], label %[[FOR1_HEADER]]
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; CHECK: [[FOR_END12]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for1.header
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for1.header:
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%j23 = phi i64 [ 0, %entry ], [ %j.next24, %for1.inc10 ]
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%cmp21 = icmp slt i64 0, %ny
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br label %singleSucc
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singleSucc:
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br i1 %cmp21, label %preheader.j, label %for1.inc10
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preheader.j:
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br label %for2
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for2:
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%j = phi i64 [ %j.next, %for2 ], [ 0, %preheader.j ]
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%arrayidx5 = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 %j, i64 %j23
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%lv = load i32, ptr %arrayidx5
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%add = add nsw i32 %lv, %k
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store i32 %add, ptr %arrayidx5
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%j.next = add nuw nsw i64 %j, 1
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%exitcond = icmp eq i64 %j, 99
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br i1 %exitcond, label %for1.inc10, label %for2
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for1.inc10:
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%j.next24 = add nuw nsw i64 %j23, 1
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%exitcond26 = icmp eq i64 %j23, 99
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br i1 %exitcond26, label %for.end12, label %for1.header
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for.end12:
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ret void
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}
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