llvm-project/llvm/test/Transforms/PhaseOrdering/lower-table-based-cttz.ll
David Green 8f968fe3ec
[AggressiveInstCombine] Make cttz fold more resiliant to non-array geps (#150896)
Similar to #150639 this fixes the AggressiveInstCombine fold for convert
tables to cttz instructions if the gep types are not array types. i.e
`gep i16 @glob, i64 %idx` instead of `gep [64 x i16] @glob, i64 0, i64 %idx`.
2025-07-31 16:53:55 +01:00

70 lines
2.6 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -O3 -S < %s | FileCheck %s
;; This tests lowering of the implementations of table-based ctz
;; algorithm to the llvm.cttz instruction in the -O3 case.
;; C producer:
;; int ctz1 (unsigned x)
;; {
;; static const char table[32] =
;; {
;; 0, 1, 28, 2, 29, 14, 24, 3, 30, 22, 20, 15, 25, 17, 4, 8,
;; 31, 27, 13, 23, 21, 19, 16, 7, 26, 12, 18, 6, 11, 5, 10, 9
;; };
;; return table[((unsigned)((x & -x) * 0x077CB531U)) >> 27];
;; }
;; Compiled as: clang -O3 test.c -S -emit-llvm -Xclang -disable-llvm-optzns
@ctz1.table = internal constant [32 x i8] c"\00\01\1C\02\1D\0E\18\03\1E\16\14\0F\19\11\04\08\1F\1B\0D\17\15\13\10\07\1A\0C\12\06\0B\05\0A\09", align 16
define i32 @ctz(i32 noundef %x) {
; CHECK-LABEL: define range(i32 0, 32) i32 @ctz(
; CHECK-SAME: i32 noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[TMP0:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[CONV:%.*]] = select i1 [[TMP1]], i32 0, i32 [[TMP0]]
; CHECK-NEXT: ret i32 [[CONV]]
;
entry:
%x.addr = alloca i32, align 4
store i32 %x, ptr %x.addr, align 4
%0 = load i32, ptr %x.addr, align 4
%1 = load i32, ptr %x.addr, align 4
%sub = sub i32 0, %1
%and = and i32 %0, %sub
%mul = mul i32 %and, 125613361
%shr = lshr i32 %mul, 27
%idxprom = zext i32 %shr to i64
%arrayidx = getelementptr inbounds [32 x i8], ptr @ctz1.table, i64 0, i64 %idxprom
%2 = load i8, ptr %arrayidx, align 1
%conv = sext i8 %2 to i32
ret i32 %conv
}
define i32 @ctz_nonarraygep(i32 noundef %x) {
; CHECK-LABEL: define range(i32 0, 32) i32 @ctz_nonarraygep(
; CHECK-SAME: i32 noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[TMP0:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[CONV:%.*]] = select i1 [[TMP1]], i32 0, i32 [[TMP0]]
; CHECK-NEXT: ret i32 [[CONV]]
;
entry:
%x.addr = alloca i32, align 4
store i32 %x, ptr %x.addr, align 4
%0 = load i32, ptr %x.addr, align 4
%1 = load i32, ptr %x.addr, align 4
%sub = sub i32 0, %1
%and = and i32 %0, %sub
%mul = mul i32 %and, 125613361
%shr = lshr i32 %mul, 27
%idxprom = zext i32 %shr to i64
%arrayidx = getelementptr inbounds i8, ptr @ctz1.table, i64 %idxprom
%2 = load i8, ptr %arrayidx, align 1
%conv = sext i8 %2 to i32
ret i32 %conv
}