207e5cccee
Similar to other targets (AMDGPU, Mips, PowerPC, RISCV, X86, ...) `ninja check-clang-codegen-aarch64` can be used to test this subfolder. Pull Request: https://github.com/llvm/llvm-project/pull/115818
22 lines
478 B
C
22 lines
478 B
C
// REQUIRES: aarch64-registered-target
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// RUN: not %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \
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// RUN: -target-feature +neon -S -O1 -o - %s | FileCheck %s
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// Assembler error
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// Output constraint : Set a vector constraint on an integer
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__SVFloat32_t funcB2()
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{
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__SVFloat32_t ret ;
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asm volatile (
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"fmov %[ret], wzr \n"
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: [ret] "=w" (ret)
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:
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:);
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return ret ;
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}
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// CHECK: funcB2
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// CHECK-ERROR: error: invalid operand for instruction
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