207e5cccee
Similar to other targets (AMDGPU, Mips, PowerPC, RISCV, X86, ...) `ninja check-clang-codegen-aarch64` can be used to test this subfolder. Pull Request: https://github.com/llvm/llvm-project/pull/115818
47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
// RUN: %clang_cc1 -triple aarch64 -target-feature +v8a -verify -DHAS8 -S %s -o -
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// RUN: %clang_cc1 -triple aarch64 -target-feature +v8.1a -verify -DHAS81 -S %s -o -
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// RUN: %clang_cc1 -triple aarch64 -target-feature +v9a -verify -DHAS9 -S %s -o -
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// REQUIRES: aarch64-registered-target
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#ifdef HAS9
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// expected-no-diagnostics
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#endif
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#include <arm_acle.h>
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#include <arm_fp16.h>
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#include <arm_sve.h>
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__attribute__((target("arch=armv8.1-a")))
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int test_crc_attr()
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{
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return __crc32cd(1, 1);
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}
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__attribute__((target("arch=armv9-a")))
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svint8_t test_svadd_attr(svbool_t pg, svint8_t op1, svint8_t op2)
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{
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return svadd_s8_z(pg, op1, op2);
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}
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__attribute__((target("arch=armv9-a")))
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float16_t test_fp16_on_v9(float16_t x, float16_t y)
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{
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return vabdh_f16(x, y);
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}
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void test_error1()
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{
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#ifdef HAS8
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// expected-error@+2{{always_inline function '__crc32cd' requires target feature 'crc'}}
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#endif
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__crc32cd(1, 1);
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}
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void test_error2()
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{
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#if defined(HAS8) || defined(HAS81)
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// expected-error@+2{{SVE vector type 'svint8_t' (aka '__SVInt8_t') cannot be used in a target without sve}}
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#endif
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svundef_s8();
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}
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