207e5cccee
Similar to other targets (AMDGPU, Mips, PowerPC, RISCV, X86, ...) `ninja check-clang-codegen-aarch64` can be used to test this subfolder. Pull Request: https://github.com/llvm/llvm-project/pull/115818
24 lines
982 B
C
24 lines
982 B
C
// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECKC
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// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -x c++ -o - %s | FileCheck %s -check-prefix=CHECKCXX
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// RUN: %clang_cc1 -triple i686-pc-linux-gnu -verify %s
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void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{'aarch64_vector_pcs' calling convention is not supported for this target}}
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// CHECKC: define{{.*}} void @g(
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// CHECKCXX: define{{.*}} void @_Z1gPi(
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void g(int *a) {
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// CHECKC: call aarch64_vector_pcs void @f(
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// CHECKCXX: call aarch64_vector_pcs void @_Z1fPi
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f(a);
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}
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// CHECKC: declare aarch64_vector_pcs void @f(
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// CHECKCXX: declare aarch64_vector_pcs void @_Z1fPi
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void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{'aarch64_vector_pcs' calling convention is not supported for this target}}
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// CHECKC: define{{.*}} aarch64_vector_pcs void @h(
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// CHECKCXX: define{{.*}} aarch64_vector_pcs void @_Z1hPi(
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f(a);
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}
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